| Message ID | 20241128081056.1361739-9-quic_ziyuzhan@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | pci: qcom: Add QCS8300 PCIe support | expand |
On 28.11.2024 9:10 AM, Ziyue Zhang wrote: > Add configurations in devicetree for PCIe1, board related gpios, > PMIC regulators, etc. > > Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 42 ++++++++++++++++++++++- > 1 file changed, 41 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts > index 7f97f771c44a..a83faba0252e 100644 > --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts > +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts > @@ -214,7 +214,7 @@ &gcc { > clocks = <&rpmhcc RPMH_CXO_CLK>, > <&sleep_clk>, > <&pcie0_phy>, > - <0>, > + <&pcie1_phy>, > <0>, > <0>, > <0>, This should be in the previous patch Otherwise lgtm Konrad
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts index 7f97f771c44a..a83faba0252e 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -214,7 +214,7 @@ &gcc { clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, <&pcie0_phy>, - <0>, + <&pcie1_phy>, <0>, <0>, <0>, @@ -240,6 +240,23 @@ &pcie0_phy { status = "okay"; }; +&pcie1 { + perst-gpios = <&tlmm 23 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&pcie1_default_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l6a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; + &qupv3_id_0 { status = "okay"; }; @@ -287,6 +304,29 @@ wake-pins { bias-pull-up; }; }; + + pcie1_default_state: pcie1-default-state { + clkreq-pins { + pins = "gpio22"; + function = "pcie1_clkreq"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-pins { + pins = "gpio23"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + wake-pins { + pins = "gpio21"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; }; &uart7 {
Add configurations in devicetree for PCIe1, board related gpios, PMIC regulators, etc. Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 42 ++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-)