Message ID | 20241127031708.2343727-1-quic_yuanjiey@quicinc.com |
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State | New |
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Wed, 27 Nov 2024 03:30:25 +0000 (GMT) Received: from pps.filterd (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by APTAIPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 4AR3UMxj015635; Wed, 27 Nov 2024 03:30:22 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 43384kk8nf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Nov 2024 03:30:22 +0000 Received: from APTAIPPMTA01.qualcomm.com (APTAIPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4AR3UMqm015630; Wed, 27 Nov 2024 03:30:22 GMT Received: from cse-cd02-lnx.ap.qualcomm.com (cse-cd02-lnx.qualcomm.com [10.64.75.246]) by APTAIPPMTA01.qualcomm.com (PPS) with ESMTPS id 4AR3ULrV015629 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Nov 2024 03:30:22 +0000 Received: by cse-cd02-lnx.ap.qualcomm.com (Postfix, from userid 4571896) id 07F2C18BF; Wed, 27 Nov 2024 11:18:34 +0800 (CST) From: Yuanjie Yang <quic_yuanjiey@quicinc.com> To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-arm-msm@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_tingweiz@quicinc.com, quic_zhgao@quicinc.com, quic_yuanjiey@quicinc.com Subject: [PATCH v1] mmc: sdhci-msm: Enable aggressive PM Date: Wed, 27 Nov 2024 11:17:08 +0800 Message-Id: <20241127031708.2343727-1-quic_yuanjiey@quicinc.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: <linux-mmc.vger.kernel.org> List-Subscribe: <mailto:linux-mmc+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-mmc+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ONVPp5CovT5fwPcWP_OjEzHflgxIIyRJ X-Proofpoint-ORIG-GUID: ONVPp5CovT5fwPcWP_OjEzHflgxIIyRJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 malwarescore=0 mlxscore=0 suspectscore=0 mlxlogscore=969 clxscore=1015 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411270027 |
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[v1] mmc: sdhci-msm: Enable aggressive PM
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diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index e00208535bd1..e3444d223513 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2627,6 +2627,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) } msm_host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY; + msm_host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM; /* Set the timeout value to max possible */ host->max_timeout_count = 0xF;
The sdhci-msm driver supports the device in both RUNNING and IDLE states, when eMMC/SD are not reading or writing, eMMC/SD are in IDLE state, the power management module will suspend the device(power off and reduce frequency, etc.), putting the device into a low-power mode. But the current sdhci-msm driver cannot put device enter into low-power mode. Enable aggressive PM capability to support runtime PM functionality, allowing the eMMC/SD card to enter lowe-power mode. Signed-off-by: Yuanjie Yang <quic_yuanjiey@quicinc.com> --- drivers/mmc/host/sdhci-msm.c | 1 + 1 file changed, 1 insertion(+)