Message ID | 20241111112921.2411242-2-ciprianmarian.costea@oss.nxp.com |
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State | New |
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Series |
add NXP LINFlexD UART clock support for S32G2/S32G3
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expand
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diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml index 4171f524a928..ca3146d9b872 100644 --- a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml @@ -34,10 +34,24 @@ properties: interrupts: maxItems: 1 + clocks: + items: + - description: + ipg clock drives the access to the LINFlexD + iomapped registers + - description: lin is the frequency of the baud clock + + clock-names: + items: + - const: ipg + - const: lin + required: - compatible - reg - interrupts + - clocks + - clock-names unevaluatedProperties: false @@ -47,4 +61,6 @@ examples: compatible = "fsl,s32v234-linflexuart"; reg = <0x40053000 0x1000>; interrupts = <0 59 4>; + clocks = <&clks 132>, <&clks 131>; + clock-names = "ipg", "lin"; };