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[10/19] hw/timer/xilinx_timer: Only expect big-endian accesses

Message ID 20241105130431.22564-11-philmd@linaro.org
State New
Headers show
Series None | expand

Commit Message

Philippe Mathieu-Daudé Nov. 5, 2024, 1:04 p.m. UTC 
Per the datasheet (reference added in file header, p.10):
'Register Data Types and Organization':

  "The XPS Timer/Counter registers are organized as big-endian data."

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/timer/xilinx_timer.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
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Patch

diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
index 28ac95edea1..3e272c8bb39 100644
--- a/hw/timer/xilinx_timer.c
+++ b/hw/timer/xilinx_timer.c
@@ -3,6 +3,9 @@ 
  *
  * Copyright (c) 2009 Edgar E. Iglesias.
  *
+ * DS573: https://docs.amd.com/v/u/en-US/xps_timer
+ * LogiCORE IP XPS Timer/Counter (v1.02a)
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
@@ -192,7 +195,7 @@  timer_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps timer_ops = {
     .read = timer_read,
     .write = timer_write,
-    .endianness = DEVICE_NATIVE_ENDIAN,
+    .endianness = DEVICE_BIG_ENDIAN,
     .impl = {
         .min_access_size = 4,
         .max_access_size = 4,