@@ -319,8 +319,7 @@ store_fpregs_to_thread (const struct regcache *regcache)
static void
fetch_sve_vg_from_thread (struct regcache *regcache)
{
- uint64_t vq = aarch64_sve_get_vq (regcache->ptid ().lwp ());
- uint64_t vg = sve_vg_from_vq (vq);
+ uint64_t vg = aarch64_sve_get_vg (regcache->ptid ().lwp ());
regcache->raw_supply (AARCH64_SVE_VG_REGNUM, &vg);
}
@@ -347,7 +346,7 @@ fetch_sveregs_from_thread (struct regcache *regcache)
static void
store_sve_vg_to_thread (struct regcache *regcache)
{
- if (!aarch64_sve_set_vq (regcache->ptid ().lwp (), regcache))
+ if (!aarch64_sve_set_vg (regcache->ptid ().lwp (), regcache))
perror_with_name (_ ("Unable to set VG register"));
}
@@ -909,7 +908,7 @@ aarch64_linux_nat_target::read_description ()
/* SVE/SSVE check. Reading VQ may return either the regular vector length
or the streaming vector length, depending on whether streaming mode is
active or not. */
- features.sve = aarch64_sve_get_vq (tid) != 0;
+ features.sve = aarch64_sve_get_vg (tid) != 0;
features.pauth = hwcap & AARCH64_HWCAP_PACA;
features.mte = hwcap2 & HWCAP2_MTE;
features.tls = aarch64_tls_register_count (tid);
@@ -1023,7 +1022,7 @@ aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
the tdep. */
aarch64_gdbarch_tdep *tdep
= gdbarch_tdep<aarch64_gdbarch_tdep> (inf->arch ());
- bool sve = aarch64_sve_get_vq (ptid.lwp ()) != 0;
+ bool sve = aarch64_sve_get_vg (ptid.lwp ()) != 0;
uint64_t svq = aarch64_za_get_svq (ptid.lwp ());
if (sve == tdep->has_sve && svq == tdep->sme_svq)
return inf->arch ();
@@ -217,7 +217,7 @@ aarch64_sve_vl_valid (const bool sve_state, size_t vl)
/* See nat/aarch64-scalable-linux-ptrace.h. */
uint64_t
-aarch64_sve_get_vq (int tid)
+aarch64_sve_get_vg (int tid)
{
struct iovec iovec;
struct user_sve_header header;
@@ -234,10 +234,10 @@ aarch64_sve_get_vq (int tid)
return 0;
}
- /* Ptrace gives the vector length in bytes. Convert it to VQ, the number of
- 128bit chunks in a Z register. We use VQ because 128 bits is the minimum
- a Z register can increase in size. */
- uint64_t vq = sve_vq_from_vl (header.vl);
+ /* Ptrace gives the vector length in bytes. Convert it to VG, the number
+ of 64-bit chunks in a Z register. We use VG because DWARF defines a VG
+ pseudo-register. */
+ uint64_t vg = sve_vg_from_vl (header.vl);
if (!aarch64_sve_vl_valid (has_sve_state, header.vl))
{
@@ -245,13 +245,13 @@ aarch64_sve_get_vq (int tid)
return 0;
}
- return vq;
+ return vg;
}
/* See nat/aarch64-scalable-linux-ptrace.h. */
bool
-aarch64_sve_set_vq (int tid, uint64_t vq)
+aarch64_sve_set_vg (int tid, uint64_t vg)
{
struct iovec iovec;
struct user_sve_header header;
@@ -269,7 +269,7 @@ aarch64_sve_set_vq (int tid, uint64_t vq)
return false;
}
- header.vl = sve_vl_from_vq (vq);
+ header.vl = sve_vl_from_vg (vg);
if (ptrace (PTRACE_SETREGSET, tid, has_sve_state? NT_ARM_SVE : NT_ARM_SSVE,
&iovec) < 0)
@@ -284,7 +284,7 @@ aarch64_sve_set_vq (int tid, uint64_t vq)
/* See nat/aarch64-scalable-linux-ptrace.h. */
bool
-aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf)
+aarch64_sve_set_vg (int tid, struct reg_buffer_common *reg_buf)
{
uint64_t reg_vg = 0;
@@ -296,18 +296,16 @@ aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf)
{
/* If vg is not available yet, fetch it from ptrace. The VG value from
ptrace is likely the correct one. */
- uint64_t vq = aarch64_sve_get_vq (tid);
+ reg_vg = aarch64_sve_get_vg (tid);
/* If something went wrong, just bail out. */
- if (vq == 0)
+ if (reg_vg == 0)
return false;
-
- reg_vg = sve_vg_from_vq (vq);
}
else
reg_buf->raw_collect (AARCH64_SVE_VG_REGNUM, ®_vg);
- return aarch64_sve_set_vq (tid, sve_vq_from_vg (reg_vg));
+ return aarch64_sve_set_vg (tid, reg_vg);
}
/* See nat/aarch64-scalable-linux-ptrace.h. */
@@ -410,9 +408,9 @@ aarch64_za_set_svq (int tid, const struct reg_buffer_common *reg_buf,
gdb::byte_vector
aarch64_fetch_sve_regset (int tid)
{
- uint64_t vq = aarch64_sve_get_vq (tid);
+ uint64_t vg = aarch64_sve_get_vg (tid);
- if (vq == 0)
+ if (vg == 0)
perror_with_name (_("Unable to fetch SVE/SSVE vector length"));
/* A ptrace call with NT_ARM_SVE will return a header followed by either a
@@ -420,6 +418,7 @@ aarch64_fetch_sve_regset (int tid)
the one returned by NT_FPREGSET) if the kernel has not yet executed any
SVE code. Make sure we allocate enough space for a full SVE dump. */
+ uint64_t vq = sve_vq_from_vg (vg);
gdb::byte_vector sve_state (SVE_PT_SIZE (vq, SVE_PT_REGS_SVE), 0);
struct iovec iovec;
@@ -709,7 +708,7 @@ aarch64_sve_regs_copy_from_reg_buf (int tid,
{
/* First store the vector length to the thread. This is done first to
ensure the ptrace buffers read from the kernel are the correct size. */
- if (!aarch64_sve_set_vq (tid, reg_buf))
+ if (!aarch64_sve_set_vg (tid, reg_buf))
perror_with_name (_("Unable to set VG register"));
/* Obtain a dump of SVE registers from ptrace. */
@@ -80,15 +80,15 @@ bool read_za_header (int tid, struct user_za_header &header);
Return true if successful, false otherwise. */
bool write_za_header (int tid, const struct user_za_header &header);
-/* Read VQ for the given tid using ptrace. If SVE is not supported then zero
- is returned (on a system that supports SVE, then VQ cannot be zero). */
-uint64_t aarch64_sve_get_vq (int tid);
+/* Read VG for the given tid using ptrace. If SVE is not supported then zero
+ is returned (on a system that supports SVE, then VG cannot be zero). */
+uint64_t aarch64_sve_get_vg (int tid);
-/* Set VQ in the kernel for the given tid, using either the value VQ or
+/* Set VG in the kernel for the given tid, using either the value VG or
reading from the register VG in the register buffer. */
-bool aarch64_sve_set_vq (int tid, uint64_t vq);
-bool aarch64_sve_set_vq (int tid, struct reg_buffer_common *reg_buf);
+bool aarch64_sve_set_vg (int tid, uint64_t vg);
+bool aarch64_sve_set_vg (int tid, struct reg_buffer_common *reg_buf);
/* Read the streaming mode vq (svq) for the given TID. If the ZA state is not
supported or active, return 0. */
@@ -938,7 +938,7 @@ aarch64_target::low_arch_setup ()
struct aarch64_features features;
int pid = current_thread->id.pid ();
- features.sve = aarch64_sve_get_vq (tid) != 0;
+ features.sve = aarch64_sve_get_vg (tid) != 0;
/* A-profile PAC is 64-bit only. */
features.pauth = linux_get_hwcap (pid, 8) & AARCH64_HWCAP_PACA;
/* A-profile MTE is 64-bit only. */
GDB uses VQ ("vector quotient", i.e. chunks of 128-bit values) profusely, but it's actually easier for a debugger to work in terms of VG ("vector granule", i.e. chunks of 64-bit values) because DWARF defines the VG register. The only place where we need to use VQ is with the SVE_PT_SIZE macro. --- gdb/aarch64-linux-nat.c | 9 +++---- gdb/nat/aarch64-scalable-linux-ptrace.c | 33 ++++++++++++------------- gdb/nat/aarch64-scalable-linux-ptrace.h | 12 ++++----- gdbserver/linux-aarch64-low.cc | 2 +- 4 files changed, 27 insertions(+), 29 deletions(-)