| Message ID | 20241015120750.21217-2-quic_jseerapu@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add Block event interrupt support for I2C protocol | expand |
On 10/16/2024 10:24 AM, Vinod Koul wrote: > On 15-10-24, 17:37, Jyothi Kumar Seerapu wrote: >> When high performance with multiple i2c messages in a single transfer >> is required, employ Block Event Interrupt (BEI) to trigger interrupts >> after specific messages transfer and the last message transfer, >> thereby reducing interrupts. >> >> For each i2c message transfer, a series of Transfer Request Elements(TREs) >> must be programmed, including config tre for frequency configuration, >> go tre for holding i2c address and dma tre for holding dma buffer address, >> length as per the hardware programming guide. For transfer using BEI, >> multiple I2C messages may necessitate the preparation of config, go, >> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, >> potentially leading to failures due to inadequate memory space. >> >> Add additional argument to dma-cell property for channel TRE size. >> With this, adjust the channel TRE size via the device tree. >> The default size is 64, but clients can modify this value based on >> their specific requirements. >> >> Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> >> --- >> Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> index 4df4e61895d2..002495921643 100644 >> --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> @@ -54,14 +54,16 @@ properties: >> maxItems: 13 >> >> "#dma-cells": >> - const: 3 >> + minItems: 3 >> + maxItems: 4 >> description: > >> DMA clients must use the format described in dma.txt, giving a phandle >> - to the DMA controller plus the following 3 integer cells: >> + to the DMA controller plus the following 4 integer cells: >> - channel: if set to 0xffffffff, any available channel will be allocated >> for the client. Otherwise, the exact channel specified will be used. >> - seid: serial id of the client as defined in the SoC documentation. >> - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h >> + - channel-tre-size: size of the channel TRE (transfer ring element) > This is a firmware /software property, why should this be in hardware > description? This is a software property and here trying to add channel tre size as a 4th argument of dma-cells property. In V2, i have reverted the DT and binding changes related to adding new argument for dma-cells property and used GPI driver defined value. Regards, JyothiKumar >
On 10/16/2024 10:24 AM, Vinod Koul wrote: > On 15-10-24, 17:37, Jyothi Kumar Seerapu wrote: >> When high performance with multiple i2c messages in a single transfer >> is required, employ Block Event Interrupt (BEI) to trigger interrupts >> after specific messages transfer and the last message transfer, >> thereby reducing interrupts. >> >> For each i2c message transfer, a series of Transfer Request Elements(TREs) >> must be programmed, including config tre for frequency configuration, >> go tre for holding i2c address and dma tre for holding dma buffer address, >> length as per the hardware programming guide. For transfer using BEI, >> multiple I2C messages may necessitate the preparation of config, go, >> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, >> potentially leading to failures due to inadequate memory space. >> >> Add additional argument to dma-cell property for channel TRE size. >> With this, adjust the channel TRE size via the device tree. >> The default size is 64, but clients can modify this value based on >> their specific requirements. >> >> Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> >> --- >> Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> index 4df4e61895d2..002495921643 100644 >> --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml >> @@ -54,14 +54,16 @@ properties: >> maxItems: 13 >> >> "#dma-cells": >> - const: 3 >> + minItems: 3 >> + maxItems: 4 >> description: > >> DMA clients must use the format described in dma.txt, giving a phandle >> - to the DMA controller plus the following 3 integer cells: >> + to the DMA controller plus the following 4 integer cells: >> - channel: if set to 0xffffffff, any available channel will be allocated >> for the client. Otherwise, the exact channel specified will be used. >> - seid: serial id of the client as defined in the SoC documentation. >> - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h >> + - channel-tre-size: size of the channel TRE (transfer ring element) > > This is a firmware /software property, why should this be in hardware > description? > Hi, Yes, this is a software property and added as a 4th argument of "dma-cells" for configuring channel tre size, so added the description for dma-cells. In V2 patch, i reverted the changes and will handle with the default channel tre size present in the GPI driver. Regards, JyothiKumar
diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index 4df4e61895d2..002495921643 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -54,14 +54,16 @@ properties: maxItems: 13 "#dma-cells": - const: 3 + minItems: 3 + maxItems: 4 description: > DMA clients must use the format described in dma.txt, giving a phandle - to the DMA controller plus the following 3 integer cells: + to the DMA controller plus the following 4 integer cells: - channel: if set to 0xffffffff, any available channel will be allocated for the client. Otherwise, the exact channel specified will be used. - seid: serial id of the client as defined in the SoC documentation. - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h + - channel-tre-size: size of the channel TRE (transfer ring element) iommus: maxItems: 1
When high performance with multiple i2c messages in a single transfer is required, employ Block Event Interrupt (BEI) to trigger interrupts after specific messages transfer and the last message transfer, thereby reducing interrupts. For each i2c message transfer, a series of Transfer Request Elements(TREs) must be programmed, including config tre for frequency configuration, go tre for holding i2c address and dma tre for holding dma buffer address, length as per the hardware programming guide. For transfer using BEI, multiple I2C messages may necessitate the preparation of config, go, and tx DMA TREs. However, a channel TRE size of 64 is often insufficient, potentially leading to failures due to inadequate memory space. Add additional argument to dma-cell property for channel TRE size. With this, adjust the channel TRE size via the device tree. The default size is 64, but clients can modify this value based on their specific requirements. Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> --- Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)