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[1/1] pinctrl: ocelot: fix system hang on level based interrupts

Message ID 20241006181310.181309-2-matsievskiysv@gmail.com
State New
Headers show
Series [1/1] pinctrl: ocelot: fix system hang on level based interrupts | expand

Commit Message

Sergey Matsievskiy Oct. 6, 2024, 6:13 p.m. UTC 
Fix interrupt handle loops, produced by spurious and short level based
interrupts by unconditionally clearing the parent interrupt, even when
no GPIO interrupts are pending.

Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
---
 drivers/pinctrl/pinctrl-ocelot.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
index be9b8c010167..d1ab8450ea93 100644
--- a/drivers/pinctrl/pinctrl-ocelot.c
+++ b/drivers/pinctrl/pinctrl-ocelot.c
@@ -1955,21 +1955,21 @@  static void ocelot_irq_handler(struct irq_desc *desc)
 	unsigned int reg = 0, irq, i;
 	unsigned long irqs;
 
+	chained_irq_enter(parent_chip, desc);
+
 	for (i = 0; i < info->stride; i++) {
 		regmap_read(info->map, id_reg + 4 * i, &reg);
 		if (!reg)
 			continue;
 
-		chained_irq_enter(parent_chip, desc);
-
 		irqs = reg;
 
 		for_each_set_bit(irq, &irqs,
 				 min(32U, info->desc->npins - 32 * i))
 			generic_handle_domain_irq(chip->irq.domain, irq + 32 * i);
-
-		chained_irq_exit(parent_chip, desc);
 	}
+
+	chained_irq_exit(parent_chip, desc);
 }
 
 static int ocelot_gpiochip_register(struct platform_device *pdev,