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[v3,1/3] MAINTAINERS: Cover PowerPC SPI model in PowerNV section

Message ID 20240918165045.21298-2-chalapathi.v@linux.ibm.com
State New
Headers show
Series [v3,1/3] MAINTAINERS: Cover PowerPC SPI model in PowerNV section | expand

Commit Message

Chalapathi V Sept. 18, 2024, 4:50 p.m. UTC
From: "Philippe Mathieu-Daudé" <philmd@linaro.org>

It is unfair to let the PowerNV SPI model to the SSI
maintainers. Also include the PowerNV ones.

Fixes: 29318db133 ("hw/ssi: Add SPI model")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
---
 MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index ffacd60f40..b11c4edaf0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1541,8 +1541,10 @@  F: hw/ppc/pnv*
 F: hw/intc/pnv*
 F: hw/intc/xics_pnv.c
 F: hw/pci-host/pnv*
+F: hw/ssi/pnv_spi.c
 F: include/hw/ppc/pnv*
 F: include/hw/pci-host/pnv*
+F: hw/ssi/pnv_spi*
 F: pc-bios/skiboot.lid
 F: tests/qtest/pnv*
 F: tests/functional/test_ppc64_powernv.py