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From: Nick Chan <towinchenmi@gmail.com>
To: Hector Martin <marcan@marcan.st>,
Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Rob Herring <robh@kernel.org>,
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Catalin Marinas <catalin.marinas@arm.com>,
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linux-kernel@vger.kernel.org,
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Cc: Konrad Dybcio <konradybcio@kernel.org>,
Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>,
Nick Chan <towinchenmi@gmail.com>
Subject: [PATCH 01/22] dt-bindings: arm: cpus: Add Apple A7-A11 CPU cores
Date: Wed, 11 Sep 2024 16:40:51 +0800
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|
| Series |
Initial device trees for A7-A11 based Apple devices
|
expand
|
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index f308ff6c3532..3959e022079f 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -89,6 +89,12 @@ properties: - apple,blizzard - apple,icestorm - apple,firestorm + - apple,mistral + - apple,monsoon + - apple,hurricane-zephyr + - apple,twister + - apple,typhoon + - apple,cyclone - arm,arm710t - arm,arm720t - arm,arm740t
Add the following CPU cores: - apple,cyclone: A7 cores - apple,typhoon: A8 cores - apple,twister: A9 cores - apple,hurricane-zephyr: A10 logical cores - apple,monsoon: A11 performance cores - apple,mistral: A11 efficiency cores In the Apple A10, there are physical performance-efficiency cores that forms logical cores to software depending on the current p-state, and only one type of core may be active at one time. Signed-off-by: Nick Chan <towinchenmi@gmail.com> --- Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ 1 file changed, 6 insertions(+)