Message ID | 20240910175357.229075-4-prabhakar.mahadev-lad.rj@bp.renesas.com |
---|---|
State | Superseded |
Headers | show |
Series | [v2,01/16] media: platform: rzg2l-cru: rzg2l-ip: Use the RZG2L_CRU_IP_SINK/SOURCE enum entries | expand |
Hi Prabhakar, Thank you for the patch. On Tue, Sep 10, 2024 at 06:53:44PM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Mark the sink and source pad with the MEDIA_PAD_FL_MUST_CONNECT flag to > ensure pipeline validation fails if it is not connected. The MUST_CONNECT flag only affects sink pads. That's not documented though, and it seems that most drivers using the flag sets it on both sink and source pads. That's probably a good practice, and the fact that the flag is only checked for sink pads is more of an implementation detail. This patch is thus fine. Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> However, I think you should then set the flag on the source pad of the IP entity in patch 02/16. You can keep my Rb. > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c > index c7fdee347ac8..2f4c87ede8bf 100644 > --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c > +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c > @@ -795,13 +795,15 @@ static int rzg2l_csi2_probe(struct platform_device *pdev) > csi2->subdev.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; > csi2->subdev.entity.ops = &rzg2l_csi2_entity_ops; > > - csi2->pads[RZG2L_CSI2_SINK].flags = MEDIA_PAD_FL_SINK; > + csi2->pads[RZG2L_CSI2_SINK].flags = MEDIA_PAD_FL_SINK | > + MEDIA_PAD_FL_MUST_CONNECT; > /* > * TODO: RZ/G2L CSI2 supports 4 virtual channels, as virtual > * channels should be implemented by streams API which is under > * development lets hardcode to VC0 for now. > */ > - csi2->pads[RZG2L_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE; > + csi2->pads[RZG2L_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE | > + MEDIA_PAD_FL_MUST_CONNECT; > ret = media_entity_pads_init(&csi2->subdev.entity, 2, csi2->pads); > if (ret) > goto error_pm;
diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index c7fdee347ac8..2f4c87ede8bf 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -795,13 +795,15 @@ static int rzg2l_csi2_probe(struct platform_device *pdev) csi2->subdev.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; csi2->subdev.entity.ops = &rzg2l_csi2_entity_ops; - csi2->pads[RZG2L_CSI2_SINK].flags = MEDIA_PAD_FL_SINK; + csi2->pads[RZG2L_CSI2_SINK].flags = MEDIA_PAD_FL_SINK | + MEDIA_PAD_FL_MUST_CONNECT; /* * TODO: RZ/G2L CSI2 supports 4 virtual channels, as virtual * channels should be implemented by streams API which is under * development lets hardcode to VC0 for now. */ - csi2->pads[RZG2L_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE; + csi2->pads[RZG2L_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE | + MEDIA_PAD_FL_MUST_CONNECT; ret = media_entity_pads_init(&csi2->subdev.entity, 2, csi2->pads); if (ret) goto error_pm;