diff mbox series

[v2,17/21] dt-bindings: serial: document support for SA8255p

Message ID 20240903220240.2594102-18-quic_nkela@quicinc.com
State New
Headers show
Series [v2,01/21] dt-bindings: arm: qcom: add the SoC ID for SA8255P | expand

Commit Message

Nikunj Kela Sept. 3, 2024, 10:02 p.m. UTC
Add compatibles representing UART support on SA8255p.

Clocks and interconnects are being configured in the firmware VM
on SA8255p platform, therefore making them optional.

CC: Praveen Talari <quic_ptalari@quicinc.com>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
---
 .../serial/qcom,serial-geni-qcom.yaml         | 53 ++++++++++++++++---
 1 file changed, 47 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
index dd33794b3534..b63c984684f3 100644
--- a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
+++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml
@@ -10,14 +10,13 @@  maintainers:
   - Andy Gross <agross@kernel.org>
   - Bjorn Andersson <bjorn.andersson@linaro.org>
 
-allOf:
-  - $ref: /schemas/serial/serial.yaml#
-
 properties:
   compatible:
     enum:
       - qcom,geni-uart
       - qcom,geni-debug-uart
+      - qcom,sa8255p-geni-uart
+      - qcom,sa8255p-geni-debug-uart
 
   clocks:
     maxItems: 1
@@ -51,18 +50,49 @@  properties:
       - const: sleep
 
   power-domains:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  power-domain-names:
+    items:
+      - const: power
+      - const: perf
 
   reg:
     maxItems: 1
 
 required:
   - compatible
-  - clocks
-  - clock-names
   - interrupts
   - reg
 
+allOf:
+  - $ref: /schemas/serial/serial.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sa8255p-geni-uart
+              - qcom,sa8255p-geni-debug-uart
+    then:
+      required:
+        - power-domains
+        - power-domain-names
+
+      properties:
+        power-domains:
+          minItems: 2
+
+    else:
+      required:
+        - clocks
+        - clock-names
+
+      properties:
+        power-domains:
+          maxItems: 1
+
 unevaluatedProperties: false
 
 examples:
@@ -83,4 +113,15 @@  examples:
                         <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
         interconnect-names = "qup-core", "qup-config";
     };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    serial@990000 {
+        compatible = "qcom,sa8255p-geni-uart";
+        reg = <0x990000 0x4000>;
+        interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
+        power-domains = <&scmi11_pd 4>, <&scmi11_dvfs 4>;
+        power-domain-names = "power", "perf";
+    };
 ...