diff mbox series

[v1,1/2] dt-bindings: arm: Add Qualcomm extended CTI

Message ID 20240903121847.6964-2-quic_jinlmao@quicinc.com
State New
Headers show
Series [v1,1/2] dt-bindings: arm: Add Qualcomm extended CTI | expand

Commit Message

Mao Jinlong Sept. 3, 2024, 12:18 p.m. UTC 
Add Qualcomm extended CTI support in CTI binding file. Qualcomm
extended CTI supports up to 128 triggers.

Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
 .../devicetree/bindings/arm/arm,coresight-cti.yaml | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
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Patch

diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
index 6a73eaa66a42..141efba7c697 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
@@ -87,6 +87,10 @@  properties:
           - const: arm,coresight-cti-v8-arch
           - const: arm,coresight-cti
           - const: arm,primecell
+      - items:
+          - const: qcom,coresight-cti-extended
+          - const: arm,coresight-cti
+          - const: arm,primecell
 
   reg:
     maxItems: 1
@@ -254,6 +258,16 @@  examples:
       clocks = <&soc_smc50mhz>;
       clock-names = "apb_pclk";
     };
+  # minimum extended CTI definition.
+  - |
+    cti@10010000 {
+      compatible = "qcom,coresight-cti-extended", "arm,coresight-cti",
+                   "arm,primecell";
+      reg = <0x10010000 0x1000>;
+
+      clocks = <&aoss_qmp>;
+      clock-names = "apb_pclk";
+    };
   #  v8 architecturally defined CTI - CPU + ETM connections generated by the
   #  driver according to the v8 architecture specification.
   - |