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[2/2] arm64: dts: qcom: msm8998: add qcom,msm8998-lpass-smmu compatible

Message ID 20240819-smmu-v1-2-bce6e4738825@freebox.fr
State New
Headers show
Series Work around reserved SMMU context bank on msm8998 | expand

Commit Message

Marc Gonzalez Aug. 19, 2024, 12:59 p.m. UTC
The msm8998 LPASS SMMU requires special treatment, because FW reserves
the last context bank for its own use.

Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Dmitry Baryshkov Aug. 28, 2024, 8:48 p.m. UTC | #1
On Mon, Aug 19, 2024 at 02:59:36PM GMT, Marc Gonzalez wrote:
> The msm8998 LPASS SMMU requires special treatment, because FW reserves
> the last context bank for its own use.
> 
> Signed-off-by: Marc Gonzalez <mgonzalez@freebox.fr>
> ---
>  arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> index 1537e42fa03ca..f169f2dd281c3 100644
> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
> @@ -1616,7 +1616,7 @@ gpucc: clock-controller@5065000 {
>  		};
>  
>  		lpass_q6_smmu: iommu@5100000 {
> -			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
> +			compatible = "qcom,msm8998-lpass-smmu", "qcom,msm8998-smmu-v2", "qcom,smmu-v2";

Please also update the bindings.

>  			reg = <0x05100000 0x40000>;
>  			clocks = <&gcc HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
>  			clock-names = "iface";
> 
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 1537e42fa03ca..f169f2dd281c3 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1616,7 +1616,7 @@  gpucc: clock-controller@5065000 {
 		};
 
 		lpass_q6_smmu: iommu@5100000 {
-			compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
+			compatible = "qcom,msm8998-lpass-smmu", "qcom,msm8998-smmu-v2", "qcom,smmu-v2";
 			reg = <0x05100000 0x40000>;
 			clocks = <&gcc HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
 			clock-names = "iface";