| Message ID | 20240815154736.58269-1-giovanni.cabiddu@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | crypto: qat - fix "Full Going True" macro definition | expand |
On Thu, Aug 15, 2024 at 04:47:23PM +0100, Giovanni Cabiddu wrote: > From: Svyatoslav Pankratov <svyatoslav.pankratov@intel.com> > > The macro `ADF_RP_INT_SRC_SEL_F_RISE_MASK` is currently set to the value > `0100b` which means "Empty Going False". This might cause an incorrect > restore of the bank state during live migration. > > Fix the definition of the macro to properly represent the "Full Going > True" state which is encoded as `0011b`. > > Fixes: bbfdde7d195f ("crypto: qat - add bank save and restore flows") > Signed-off-by: Svyatoslav Pankratov <svyatoslav.pankratov@intel.com> > Reviewed-by: Xin Zeng <xin.zeng@intel.com> > Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> > --- > drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Patch applied. Thanks.
diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h index 8b10926cedba..e8c53bd76f1b 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h @@ -83,7 +83,7 @@ #define ADF_WQM_CSR_RPRESETSTS(bank) (ADF_WQM_CSR_RPRESETCTL(bank) + 4) /* Ring interrupt */ -#define ADF_RP_INT_SRC_SEL_F_RISE_MASK BIT(2) +#define ADF_RP_INT_SRC_SEL_F_RISE_MASK GENMASK(1, 0) #define ADF_RP_INT_SRC_SEL_F_FALL_MASK GENMASK(2, 0) #define ADF_RP_INT_SRC_SEL_RANGE_WIDTH 4 #define ADF_COALESCED_POLL_TIMEOUT_US (1 * USEC_PER_SEC)