| Message ID | 20240813152610.97883-1-philmd@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [PATCH-for-9.1?] target/mips: Load PTE as DATA | expand |
On 8/14/24 01:26, Philippe Mathieu-Daudé wrote: > PTE is not CODE so load it as normal DATA access. > > Fixes: 074cfcb4da ("Implement hardware page table walker for MIPS32") > Suggested-by: Richard Henderson<richard.henderson@linaro.org> > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > Based-on:<20240813135313.96519-1-philmd@linaro.org> > --- > target/mips/tcg/sysemu/tlb_helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 5bff4cb72f..7050ea78df 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -603,9 +603,9 @@ static bool get_pte(CPUMIPSState *env, uint64_t vaddr, MemOp op, oi = make_memop_idx(op | MO_TE, ptw_mmu_idx); if (op == MO_64) { - *pte = cpu_ldq_code_mmu(env, vaddr, oi, 0); + *pte = cpu_ldq_mmu(env, vaddr, oi, 0); } else { - *pte = cpu_ldl_code_mmu(env, vaddr, oi, 0); + *pte = cpu_ldl_mmu(env, vaddr, oi, 0); } return true;
PTE is not CODE so load it as normal DATA access. Fixes: 074cfcb4da ("Implement hardware page table walker for MIPS32") Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- Based-on: <20240813135313.96519-1-philmd@linaro.org> --- target/mips/tcg/sysemu/tlb_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)