| Message ID | 4fb65d188978955861cc3d3bf665ca83b8debb9b.1723056910.git.nicolinc@nvidia.com |
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Wed, 7 Aug 2024 12:00:22 -0700 From: Nicolin Chen <nicolinc@nvidia.com> To: <jgg@nvidia.com>, <kevin.tian@intel.com>, <will@kernel.org> CC: <robin.murphy@arm.com>, <joro@8bytes.org>, <shuah@kernel.org>, <iommu@lists.linux.dev>, <linux-kernel@vger.kernel.org>, <linux-kselftest@vger.kernel.org> Subject: [PATCH v3 4/4] iommu/arm-smmu-v3: Implement arm_smmu_get_msi_mapping_domain Date: Wed, 7 Aug 2024 12:00:07 -0700 Message-ID: <4fb65d188978955861cc3d3bf665ca83b8debb9b.1723056910.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <cover.1723056910.git.nicolinc@nvidia.com> References: <cover.1723056910.git.nicolinc@nvidia.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: <linux-kselftest.vger.kernel.org> List-Subscribe: <mailto:linux-kselftest+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kselftest+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDF:EE_|MN0PR12MB6004:EE_ X-MS-Office365-Filtering-Correlation-Id: 7c785ad3-ef6c-4fad-b880-08dcb7133d32 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; 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iommu: Support IOMMU_RESV_SW_MSI with nesting
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diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 24836f3269b3..3962d5a55519 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3305,10 +3305,20 @@ static int arm_smmu_cache_invalidate_user(struct iommu_domain *domain, return ret; } +static struct iommu_domain * +arm_smmu_get_msi_mapping_domain(struct iommu_domain *domain) +{ + struct arm_smmu_nested_domain *nested_domain = + container_of(domain, struct arm_smmu_nested_domain, domain); + + return &nested_domain->s2_parent->domain; +} + static const struct iommu_domain_ops arm_smmu_nested_ops = { .attach_dev = arm_smmu_attach_dev_nested, .free = arm_smmu_domain_nested_free, .cache_invalidate_user = arm_smmu_cache_invalidate_user, + .get_msi_mapping_domain = arm_smmu_get_msi_mapping_domain, }; static struct iommu_domain *
In a 1-stage translation setup, a device is attached to a paging domain. In a 2-stage translation setup, a device is attached to a nested domain, which does not have the mappings for the MSI page but only an s2_parent paging domain pointer that holds the mappings. Add arm_smmu_get_msi_mapping_domain in arm_smmu_nested_ops to return the correct paging domain. Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++++++++++ 1 file changed, 10 insertions(+)