| Message ID | 20161109145748.27282-20-alex.bennee@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 11/09/2016 03:57 PM, Alex Bennée wrote: > This enables the multi-threaded system emulation by default for ARMv7 > and ARMv8 guests using the x86_64 TCG backend. This means: > > - The x86_64 TCG backend supports cmpxchg based atomic ops > - The x86_64 TCG backend emits barriers for barrier ops What tcg backend doesn't support what we need? For a weakly ordered target, any of our hosts should work. r~
Richard Henderson <rth@twiddle.net> writes: > On 11/09/2016 03:57 PM, Alex Bennée wrote: >> This enables the multi-threaded system emulation by default for ARMv7 >> and ARMv8 guests using the x86_64 TCG backend. This means: >> >> - The x86_64 TCG backend supports cmpxchg based atomic ops >> - The x86_64 TCG backend emits barriers for barrier ops > > What tcg backend doesn't support what we need? For a weakly ordered target, > any of our hosts should work. True, but this comes with certification that I've tested it. But you are right adding this to configure is fugly. Should I just drop the backend config symbol requirement totally? -- Alex Bennée
On 11/10/2016 07:13 PM, Alex Bennée wrote: > > Richard Henderson <rth@twiddle.net> writes: > >> On 11/09/2016 03:57 PM, Alex Bennée wrote: >>> This enables the multi-threaded system emulation by default for ARMv7 >>> and ARMv8 guests using the x86_64 TCG backend. This means: >>> >>> - The x86_64 TCG backend supports cmpxchg based atomic ops >>> - The x86_64 TCG backend emits barriers for barrier ops >> >> What tcg backend doesn't support what we need? For a weakly ordered target, >> any of our hosts should work. > > True, but this comes with certification that I've tested it. But you are > right adding this to configure is fugly. Should I just drop the backend > config symbol requirement totally? I was thinking that a good backend config symbol would somehow indicate the memory ordering strength of the host. Preferably in such a way that we can tell that host >= guest. I dunno if we assign ordinal numbers in some arbitrary way, or try something more complex such as x86_64) HOST_MTTCG_MO='TCG_MO_ALL & ~TCG_MO_LD_ST' Or maybe put this in tcg/*/tcg-target.h in preference to configure. Then enable mttcg if the host memory-order is a superset of the guest, (GUEST_MTTCG_MO & ~HOST_MTTCG_MO) == 0 r~
diff --git a/configure b/configure index fd6f898..685eb03 100755 --- a/configure +++ b/configure @@ -516,6 +516,7 @@ else fi ARCH= +host_mttcg_support= # Normalise host CPU name and set ARCH. # Note that this case should only have supported host CPUs, not guests. case "$cpu" in @@ -527,6 +528,7 @@ case "$cpu" in ;; x86_64|amd64) cpu="x86_64" + host_mttcg_support=yes ;; armv*b|armv*l|arm) cpu="arm" @@ -5703,6 +5705,10 @@ if test "$pthread_setname_np" = "yes" ; then echo "CONFIG_PTHREAD_SETNAME_NP=y" >> $config_host_mak fi +if test "$host_mttcg_support" = "yes" ; then + echo "CONFIG_MTTCG_HOST=y" >> $config_host_mak +fi + if test "$tcg_interpreter" = "yes"; then QEMU_INCLUDES="-I\$(SRC_PATH)/tcg/tci $QEMU_INCLUDES" elif test "$ARCH" = "sparc64" ; then @@ -5815,6 +5821,7 @@ target_dir="$target" config_target_mak=$target_dir/config-target.mak target_name=$(echo $target | cut -d '-' -f 1) target_bigendian="no" +target_mttcg_support="no" case "$target_name" in armeb|lm32|m68k|microblaze|mips|mipsn32|mips64|moxie|or32|ppc|ppcemb|ppc64|ppc64abi32|s390x|sh4eb|sparc|sparc64|sparc32plus|xtensaeb) @@ -5872,11 +5879,13 @@ case "$target_name" in TARGET_ARCH=arm bflt="yes" gdb_xml_files="arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml" + target_mttcg_support="yes" ;; aarch64) TARGET_BASE_ARCH=arm bflt="yes" gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml" + target_mttcg_support="yes" ;; cris) ;; @@ -6027,6 +6036,9 @@ if test "$target_bigendian" = "yes" ; then fi if test "$target_softmmu" = "yes" ; then echo "CONFIG_SOFTMMU=y" >> $config_target_mak + if test "$target_mttcg_support" = "yes" ; then + echo "CONFIG_MTTCG_TARGET=y" >> $config_target_mak + fi fi if test "$target_user_only" = "yes" ; then echo "CONFIG_USER_ONLY=y" >> $config_target_mak diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 6de3e16..007f751 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -115,3 +115,5 @@ CONFIG_ACPI=y CONFIG_SMBIOS=y CONFIG_ASPEED_SOC=y CONFIG_GPIO_KEY=y + +CONFIG_MTTCG_TARGET=y
This enables the multi-threaded system emulation by default for ARMv7 and ARMv8 guests using the x86_64 TCG backend. This means: - The x86_64 TCG backend supports cmpxchg based atomic ops - The x86_64 TCG backend emits barriers for barrier ops And on the guest side: - The ARM translate.c/translate-64.c have been converted to - use MTTCG safe atomic primitives - emit the appropriate barrier ops - The ARM machine has been updated to - hold the BQL when modifying shared cross-vCPU state - defer cpu_reset to async safe work Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- configure | 12 ++++++++++++ default-configs/arm-softmmu.mak | 2 ++ 2 files changed, 14 insertions(+) -- 2.10.1