| Message ID | 20240716-topic-h_bits-v1-2-f6c5d3ff982c@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | More X1E bits | expand |
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 47bb26a66b2e..120bc418c444 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -278,8 +278,8 @@ CLUSTER_C4: cpu-sleep-0 { idle-state-name = "ret"; arm,psci-suspend-param = <0x00000004>; entry-latency-us = <180>; - exit-latency-us = <320>; - min-residency-us = <1000>; + exit-latency-us = <500>; + min-residency-us = <600>; }; }; @@ -298,7 +298,7 @@ CLUSTER_CL5: cluster-sleep-1 { idle-state-name = "ret-pll-off"; arm,psci-suspend-param = <0x01000054>; entry-latency-us = <2200>; - exit-latency-us = <2500>; + exit-latency-us = <4000>; min-residency-us = <7000>; }; };
Update the numbers based on the information found in the DSDT. Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)