| Message ID | 20240711102436.4432-5-Dhananjay.Ugwekar@amd.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add per-core RAPL energy counter support for AMD CPUs | expand |
On Thu, 2024-07-11 at 10:24 +0000, Dhananjay Ugwekar wrote: > To support AMD's per_core RAPL counter, we will need to check > per_core capability of the current rapl_model multiple times in > rapl_cpu_online/offline, init_rapl_pmus functions, so cache the > matched rapl model in a global variable, to avoid calling > x86_match_cpu() multiple times. > > No functional change. > > Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> -rui > --- > arch/x86/events/rapl.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c > index c3afeaf679c2..4ee0877eb4d8 100644 > --- a/arch/x86/events/rapl.c > +++ b/arch/x86/events/rapl.c > @@ -146,6 +146,7 @@ static cpumask_t rapl_cpu_mask; > static unsigned int rapl_cntr_mask; > static u64 rapl_timer_ms; > static struct perf_msr *rapl_msrs; > +static struct rapl_model *rapl_model; > > /* > * Helper functions to get the correct topology macros according to > the > @@ -621,18 +622,18 @@ static int rapl_cpu_online(unsigned int cpu) > return 0; > } > > -static int rapl_check_hw_unit(struct rapl_model *rm) > +static int rapl_check_hw_unit(void) > { > u64 msr_rapl_power_unit_bits; > int i; > > /* protect rdmsrl() to handle virtualization */ > - if (rdmsrl_safe(rm->msr_power_unit, > &msr_rapl_power_unit_bits)) > + if (rdmsrl_safe(rapl_model->msr_power_unit, > &msr_rapl_power_unit_bits)) > return -1; > for (i = 0; i < NR_RAPL_DOMAINS; i++) > rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & > 0x1FULL; > > - switch (rm->unit_quirk) { > + switch (rapl_model->unit_quirk) { > /* > * DRAM domain on HSW server and KNL has fixed energy unit > which can be > * different than the unit from power unit MSR. See > @@ -846,21 +847,20 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); > static int __init rapl_pmu_init(void) > { > const struct x86_cpu_id *id; > - struct rapl_model *rm; > int ret; > > id = x86_match_cpu(rapl_model_match); > if (!id) > return -ENODEV; > > - rm = (struct rapl_model *) id->driver_data; > + rapl_model = (struct rapl_model *) id->driver_data; > > - rapl_msrs = rm->rapl_msrs; > + rapl_msrs = rapl_model->rapl_msrs; > > rapl_cntr_mask = perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, > - false, (void *) &rm->events); > + false, (void *) &rapl_model- > >events); > > - ret = rapl_check_hw_unit(rm); > + ret = rapl_check_hw_unit(); > if (ret) > return ret; >
diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index c3afeaf679c2..4ee0877eb4d8 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -146,6 +146,7 @@ static cpumask_t rapl_cpu_mask; static unsigned int rapl_cntr_mask; static u64 rapl_timer_ms; static struct perf_msr *rapl_msrs; +static struct rapl_model *rapl_model; /* * Helper functions to get the correct topology macros according to the @@ -621,18 +622,18 @@ static int rapl_cpu_online(unsigned int cpu) return 0; } -static int rapl_check_hw_unit(struct rapl_model *rm) +static int rapl_check_hw_unit(void) { u64 msr_rapl_power_unit_bits; int i; /* protect rdmsrl() to handle virtualization */ - if (rdmsrl_safe(rm->msr_power_unit, &msr_rapl_power_unit_bits)) + if (rdmsrl_safe(rapl_model->msr_power_unit, &msr_rapl_power_unit_bits)) return -1; for (i = 0; i < NR_RAPL_DOMAINS; i++) rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL; - switch (rm->unit_quirk) { + switch (rapl_model->unit_quirk) { /* * DRAM domain on HSW server and KNL has fixed energy unit which can be * different than the unit from power unit MSR. See @@ -846,21 +847,20 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); static int __init rapl_pmu_init(void) { const struct x86_cpu_id *id; - struct rapl_model *rm; int ret; id = x86_match_cpu(rapl_model_match); if (!id) return -ENODEV; - rm = (struct rapl_model *) id->driver_data; + rapl_model = (struct rapl_model *) id->driver_data; - rapl_msrs = rm->rapl_msrs; + rapl_msrs = rapl_model->rapl_msrs; rapl_cntr_mask = perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, - false, (void *) &rm->events); + false, (void *) &rapl_model->events); - ret = rapl_check_hw_unit(rm); + ret = rapl_check_hw_unit(); if (ret) return ret;
To support AMD's per_core RAPL counter, we will need to check per_core capability of the current rapl_model multiple times in rapl_cpu_online/offline, init_rapl_pmus functions, so cache the matched rapl model in a global variable, to avoid calling x86_match_cpu() multiple times. No functional change. Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com> --- arch/x86/events/rapl.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)