usb: dwc2: add support for other Lantiq SoCs

The size of the internal RAM of the DesignWare USB controller changed
between the different Lantiq SoCs. We have the following sizes:

Amazon + Danube: 8 KByte
Amazon SE + arx100: 2 KByte
xrx200 + xrx300: 2.5 KByte

For Danube SoC we do not provide the params and let the driver decide
to use sane defaults, for the Amazon SE and arx100 we use small fifos
and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
The auto detection of max_transfer_size and max_packet_count should
work, so remove it.

This patch is included in OpenWrt for many years.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
 drivers/usb/dwc2/params.c | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

On 7/9/24 02:20, Hauke Mehrtens wrote:
> The size of the internal RAM of the DesignWare USB controller changed
> between the different Lantiq SoCs. We have the following sizes:
> 
> Amazon + Danube: 8 KByte
> Amazon SE + arx100: 2 KByte
> xrx200 + xrx300: 2.5 KByte
> 
> For Danube SoC we do not provide the params and let the driver decide
> to use sane defaults, for the Amazon SE and arx100 we use small fifos
> and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
> The auto detection of max_transfer_size and max_packet_count should
> work, so remove it.
> 
> This patch is included in OpenWrt for many years.
> 
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

Acked-by: Minas Harutyunyan <hminas@synopsys.com>

> ---
>   drivers/usb/dwc2/params.c | 30 +++++++++++++++++++++++++-----
>   1 file changed, 25 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 5a1500d0bdd9..a937eadbc9b3 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -133,7 +133,15 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
>   	p->no_clock_gating = true;
>   }
>   
> -static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
> +static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg)
> +{
> +	struct dwc2_core_params *p = &hsotg->params;
> +
> +	p->otg_caps.hnp_support = false;
> +	p->otg_caps.srp_support = false;
> +}
> +
> +static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg)
>   {
>   	struct dwc2_core_params *p = &hsotg->params;
>   
> @@ -142,12 +150,21 @@ static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
>   	p->host_rx_fifo_size = 288;
>   	p->host_nperio_tx_fifo_size = 128;
>   	p->host_perio_tx_fifo_size = 96;
> -	p->max_transfer_size = 65535;
> -	p->max_packet_count = 511;
>   	p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
>   		GAHBCFG_HBSTLEN_SHIFT;
>   }
>   
> +static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg)
> +{
> +	struct dwc2_core_params *p = &hsotg->params;
> +
> +	p->otg_caps.hnp_support = false;
> +	p->otg_caps.srp_support = false;
> +	p->host_rx_fifo_size = 288;
> +	p->host_nperio_tx_fifo_size = 128;
> +	p->host_perio_tx_fifo_size = 136;
> +}
> +
>   static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
>   {
>   	struct dwc2_core_params *p = &hsotg->params;
> @@ -297,8 +314,11 @@ const struct of_device_id dwc2_of_match_table[] = {
>   	{ .compatible = "ingenic,x1830-otg", .data = dwc2_set_x1600_params },
>   	{ .compatible = "ingenic,x2000-otg", .data = dwc2_set_x2000_params },
>   	{ .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
> -	{ .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params },
> -	{ .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },
> +	{ .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params },
> +	{ .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params },
> +	{ .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params },
> +	{ .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params },
> +	{ .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params },
>   	{ .compatible = "snps,dwc2" },
>   	{ .compatible = "samsung,s3c6400-hsotg",
>   	  .data = dwc2_set_s3c6400_params },