@@ -67,6 +67,8 @@ slc: flash@20020000 {
reg = <0x20020000 0x1000>;
clocks = <&clk LPC32XX_CLK_SLC>;
status = "disabled";
+ dmas = <&dma 1 1>;
+ dma-names = "rx-tx";
};
mlc: flash@200a8000 {
@@ -75,6 +77,8 @@ mlc: flash@200a8000 {
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_MLC>;
status = "disabled";
+ dmas = <&dma 12 1>;
+ dma-names = "rx-tx";
};
dma: dma@31000000 {
@@ -83,6 +87,13 @@ dma: dma@31000000 {
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_DMA>;
clock-names = "apb_pclk";
+ #dma-cells = <2>;
+ dma-channels = <8>;
+ dma-requests = <16>;
+ lli-bus-interface-ahb1;
+ mem-bus-interface-ahb1;
+ memcpy-burst-size = <256>;
+ memcpy-bus-width = <32>;
};
usb {
@@ -182,6 +193,8 @@ ssp0: spi@20084000 {
clock-names = "apb_pclk";
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&dmamux 14 1 1>, <&dmamux 15 1 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -191,6 +204,8 @@ spi1: spi@20088000 {
clocks = <&clk LPC32XX_CLK_SPI1>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&dmamux 11 1 0>;
+ dma-names = "rx-tx";
status = "disabled";
};
@@ -206,6 +221,8 @@ ssp1: spi@2008c000 {
clock-names = "apb_pclk";
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&dmamux 3 1 1>, <&dmamux 11 1 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -215,12 +232,16 @@ spi2: spi@20090000 {
clocks = <&clk LPC32XX_CLK_SPI2>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&dmamux 3 1 0>;
+ dma-names = "rx-tx";
status = "disabled";
};
i2s0: i2s@20094000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x20094000 0x1000>;
+ dmas = <&dma 0 1>, <&dma 13 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -231,12 +252,16 @@ sd: sd@20098000 {
<13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_SD>;
clock-names = "apb_pclk";
+ dmas = <&dma 4 1>;
+ dma-names = "rx";
status = "disabled";
};
i2s1: i2s@2009c000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x2009c000 0x1000>;
+ dmas = <&dma 2 1>, <&dmamux 10 1 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -326,6 +351,13 @@ clk: clock-controller@0 {
clocks = <&xtal_32k>, <&xtal>;
clock-names = "xtal_32k", "xtal";
};
+
+ dmamux: dma-router@7c {
+ compatible = "nxp,lpc3220-dmamux";
+ reg = <0x7c 0x8>;
+ #dma-cells = <3>;
+ dma-masters = <&dma>;
+ };
};
mic: interrupt-controller@40008000 {
@@ -361,6 +393,8 @@ uart1: serial@40014000 {
compatible = "nxp,lpc3220-hsuart";
reg = <0x40014000 0x1000>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma 6 1>, <&dma 5 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -368,6 +402,8 @@ uart2: serial@40018000 {
compatible = "nxp,lpc3220-hsuart";
reg = <0x40018000 0x1000>;
interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dma 8 1>, <&dma 7 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
@@ -375,6 +411,8 @@ uart7: serial@4001c000 {
compatible = "nxp,lpc3220-hsuart";
reg = <0x4001c000 0x1000>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&dmamux 10 1 0>, <&dma 9 1>;
+ dma-names = "rx", "tx";
status = "disabled";
};
Adds properties declared in the new DT binding nxp,lpc3220-dmamux.yaml and corresponding phandles. Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> --- Changes for v5: - This patch is new in v5 - Split previous patch for lpc32xx.dtsi in to 3 patches arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 38 ++++++++++++++++++++++++++ 1 file changed, 38 insertions(+)