| Message ID | 20240621143903.3598230-3-gustavo.romero@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/arm: Enable FEAT_Debugv8p8 for -cpu max | expand |
On Fri, 21 Jun 2024 at 15:39, Gustavo Romero <gustavo.romero@linaro.org> wrote: > > Enable FEAT_Debugv8p8 for max CPU. This feature is out of scope for QEMU > since it concerns the external debug interface for JTAG, but is > mandatory in Armv8.8 implementations, hence it is reported as supported > in the ID registers. > > Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> > --- > target/arm/tcg/cpu32.c | 6 +++--- > target/arm/tcg/cpu64.c | 2 +- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c > index b155a0136f..a1273a73a3 100644 > --- a/target/arm/tcg/cpu32.c > +++ b/target/arm/tcg/cpu32.c > @@ -82,8 +82,8 @@ void aa32_max_features(ARMCPU *cpu) > cpu->isar.id_pfr2 = t; > > t = cpu->isar.id_dfr0; > - t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */ > - t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */ > + t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */ > + t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */ > t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */ > cpu->isar.id_dfr0 = t; > > @@ -93,7 +93,7 @@ void aa32_max_features(ARMCPU *cpu) > t = 0x00008000; > t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1); > t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1); > - t = FIELD_DP32(t, DBGDIDR, VERSION, 6); /* Armv8 debug */ > + t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */ > t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1); > t = FIELD_DP32(t, DBGDIDR, BRPS, 5); > t = FIELD_DP32(t, DBGDIDR, WRPS, 3); > diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c > index 71e1bfcd4e..fe232eb306 100644 > --- a/target/arm/tcg/cpu64.c > +++ b/target/arm/tcg/cpu64.c > @@ -1253,7 +1253,7 @@ void aarch64_max_tcg_initfn(Object *obj) > cpu->isar.id_aa64zfr0 = t; > > t = cpu->isar.id_aa64dfr0; > - t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */ > + t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 10); /* FEAT_Debugv8p8 */ > t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */ > t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* FEAT_HPMN0 */ > cpu->isar.id_aa64dfr0 = t; > -- We also need to add Feat_Debugv8p8 to the (alphabetically-sorted) list of emulated features in docs/system/arm/emulation.rst. thanks -- PMM
Hi Peter, On 6/24/24 10:27 AM, Peter Maydell wrote: > On Fri, 21 Jun 2024 at 15:39, Gustavo Romero <gustavo.romero@linaro.org> wrote: >> >> Enable FEAT_Debugv8p8 for max CPU. This feature is out of scope for QEMU >> since it concerns the external debug interface for JTAG, but is >> mandatory in Armv8.8 implementations, hence it is reported as supported >> in the ID registers. >> >> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> >> --- >> target/arm/tcg/cpu32.c | 6 +++--- >> target/arm/tcg/cpu64.c | 2 +- >> 2 files changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c >> index b155a0136f..a1273a73a3 100644 >> --- a/target/arm/tcg/cpu32.c >> +++ b/target/arm/tcg/cpu32.c >> @@ -82,8 +82,8 @@ void aa32_max_features(ARMCPU *cpu) >> cpu->isar.id_pfr2 = t; >> >> t = cpu->isar.id_dfr0; >> - t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */ >> - t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */ >> + t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */ >> + t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */ >> t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */ >> cpu->isar.id_dfr0 = t; >> >> @@ -93,7 +93,7 @@ void aa32_max_features(ARMCPU *cpu) >> t = 0x00008000; >> t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1); >> t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1); >> - t = FIELD_DP32(t, DBGDIDR, VERSION, 6); /* Armv8 debug */ >> + t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */ >> t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1); >> t = FIELD_DP32(t, DBGDIDR, BRPS, 5); >> t = FIELD_DP32(t, DBGDIDR, WRPS, 3); >> diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c >> index 71e1bfcd4e..fe232eb306 100644 >> --- a/target/arm/tcg/cpu64.c >> +++ b/target/arm/tcg/cpu64.c >> @@ -1253,7 +1253,7 @@ void aarch64_max_tcg_initfn(Object *obj) >> cpu->isar.id_aa64zfr0 = t; >> >> t = cpu->isar.id_aa64dfr0; >> - t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */ >> + t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 10); /* FEAT_Debugv8p8 */ >> t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */ >> t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* FEAT_HPMN0 */ >> cpu->isar.id_aa64dfr0 = t; >> -- > > We also need to add Feat_Debugv8p8 to the (alphabetically-sorted) > list of emulated features in docs/system/arm/emulation.rst. oh, I forgot it. Thanks, done in v3. Cheers, Gustavo
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index b155a0136f..a1273a73a3 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -82,8 +82,8 @@ void aa32_max_features(ARMCPU *cpu) cpu->isar.id_pfr2 = t; t = cpu->isar.id_dfr0; - t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */ - t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */ + t = FIELD_DP32(t, ID_DFR0, COPDBG, 10); /* FEAT_Debugv8p8 */ + t = FIELD_DP32(t, ID_DFR0, COPSDBG, 10); /* FEAT_Debugv8p8 */ t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */ cpu->isar.id_dfr0 = t; @@ -93,7 +93,7 @@ void aa32_max_features(ARMCPU *cpu) t = 0x00008000; t = FIELD_DP32(t, DBGDIDR, SE_IMP, 1); t = FIELD_DP32(t, DBGDIDR, NSUHD_IMP, 1); - t = FIELD_DP32(t, DBGDIDR, VERSION, 6); /* Armv8 debug */ + t = FIELD_DP32(t, DBGDIDR, VERSION, 10); /* FEAT_Debugv8p8 */ t = FIELD_DP32(t, DBGDIDR, CTX_CMPS, 1); t = FIELD_DP32(t, DBGDIDR, BRPS, 5); t = FIELD_DP32(t, DBGDIDR, WRPS, 3); diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 71e1bfcd4e..fe232eb306 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1253,7 +1253,7 @@ void aarch64_max_tcg_initfn(Object *obj) cpu->isar.id_aa64zfr0 = t; t = cpu->isar.id_aa64dfr0; - t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */ + t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 10); /* FEAT_Debugv8p8 */ t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */ t = FIELD_DP64(t, ID_AA64DFR0, HPMN0, 1); /* FEAT_HPMN0 */ cpu->isar.id_aa64dfr0 = t;
Enable FEAT_Debugv8p8 for max CPU. This feature is out of scope for QEMU since it concerns the external debug interface for JTAG, but is mandatory in Armv8.8 implementations, hence it is reported as supported in the ID registers. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> --- target/arm/tcg/cpu32.c | 6 +++--- target/arm/tcg/cpu64.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)