Message ID | 20240614-fix-pcie-phy-compat-v3-2-730d1811acf4@linaro.org |
---|---|
State | Accepted |
Commit | 7cd3e586068aca123ff244fc259ba62ba96b6d31 |
Headers | show |
Series | phy: qcom: qmp-pcie: drop second clock-output-names entry | expand |
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 16634f73bdcf..03dbd02cf9e7 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -91,8 +91,7 @@ properties: "#clock-cells": true clock-output-names: - minItems: 1 - maxItems: 2 + maxItems: 1 "#phy-cells": const: 0 @@ -222,14 +221,10 @@ allOf: - qcom,sm8650-qmp-gen4x2-pcie-phy then: properties: - clock-output-names: - minItems: 2 "#clock-cells": const: 1 else: properties: - clock-output-names: - maxItems: 1 "#clock-cells": const: 0