diff mbox series

[v1,1/2] dw_mmc: support platform specific hw_reset()

Message ID 3df02ffa8bdaa74f5261c8914d2545b97fb3478a.1718213918.git.limings@nvidia.com
State New
Headers show
Series eMMC RST_N support on BlueField-2 SoC | expand

Commit Message

Liming Sun June 12, 2024, 10:52 p.m. UTC 
This commit enhances the dw_mmc driver to support platform specific
hw_reset().

Reviewed-by: David Thompson <davthompson@nvidia.com>
Signed-off-by: Liming Sun <limings@nvidia.com>
---
 drivers/mmc/host/dw_mmc.c | 6 ++++++
 drivers/mmc/host/dw_mmc.h | 2 ++
 2 files changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index 8e2d676b9239..2d72da03fdfd 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1617,6 +1617,7 @@  static void dw_mci_hw_reset(struct mmc_host *mmc)
 {
 	struct dw_mci_slot *slot = mmc_priv(mmc);
 	struct dw_mci *host = slot->host;
+	const struct dw_mci_drv_data *drv_data = host->drv_data;
 	int reset;
 
 	if (host->use_dma == TRANS_MODE_IDMAC)
@@ -1626,6 +1627,11 @@  static void dw_mci_hw_reset(struct mmc_host *mmc)
 				     SDMMC_CTRL_FIFO_RESET))
 		return;
 
+	if (drv_data && drv_data->hw_reset) {
+		drv_data->hw_reset(host);
+		return;
+	}
+
 	/*
 	 * According to eMMC spec, card reset procedure:
 	 * tRstW >= 1us:   RST_n pulse width
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h
index 4ed81f94f7ca..1b86531a485c 100644
--- a/drivers/mmc/host/dw_mmc.h
+++ b/drivers/mmc/host/dw_mmc.h
@@ -565,6 +565,7 @@  struct dw_mci_slot {
  * @execute_tuning: implementation specific tuning procedure.
  * @set_data_timeout: implementation specific timeout.
  * @get_drto_clks: implementation specific cycle count for data read timeout.
+ * @hw_reset: implementation specific HW reset.
  *
  * Provide controller implementation specific extensions. The usage of this
  * data structure is fully optional and usage of each member in this structure
@@ -585,5 +586,6 @@  struct dw_mci_drv_data {
 	void		(*set_data_timeout)(struct dw_mci *host,
 					  unsigned int timeout_ns);
 	u32		(*get_drto_clks)(struct dw_mci *host);
+	void		(*hw_reset)(struct dw_mci *host);
 };
 #endif /* _DW_MMC_H_ */