| Message ID | 20240611133752.2192401-2-quic_ajipan@quicinc.com |
|---|---|
| State | Accepted |
| Commit | fff617979f97c773aaa9432c31cf62444b3bdbd4 |
| Headers | show |
| Series | clk: qcom: Add support for DISPCC, CAMCC and GPUCC on SM4450 | expand |
Hi Ajit, On 6/11/24 16:37, Ajit Pandey wrote: > In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single > PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL > register using regmap_write() API in __alpha_pll_trion_set_rate > callback will override LUCID EVO PLL initial configuration related > to PLL_CAL_L_VAL bit fields in PLL_L_VAL register. > > Observed random PLL lock failures during PLL enable due to such > override in PLL calibration value. Use regmap_update_bits() with > L_VAL bitfield mask instead of regmap_write() API to update only > PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback. > > Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces") > Cc: stable@vger.kernel.org > Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> thank you for the fix! Acked-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> -- Best wishes, Vladimir
On 6/11/24 15:37, Ajit Pandey wrote: > In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single > PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL > register using regmap_write() API in __alpha_pll_trion_set_rate > callback will override LUCID EVO PLL initial configuration related > to PLL_CAL_L_VAL bit fields in PLL_L_VAL register. > > Observed random PLL lock failures during PLL enable due to such > override in PLL calibration value. Use regmap_update_bits() with > L_VAL bitfield mask instead of regmap_write() API to update only > PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback. > > Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces") > Cc: stable@vger.kernel.org > Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/clk/qcom/clk-alpha-pll.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c > index c51647e37df8..a538559caaa0 100644 > --- a/drivers/clk/qcom/clk-alpha-pll.c > +++ b/drivers/clk/qcom/clk-alpha-pll.c > @@ -1665,7 +1665,7 @@ static int __alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate, > if (ret < 0) > return ret; > > - regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); > + regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l); Since you're altering a function used by LUCID and TRION PLLs.. how will that affect non-LUCID_EVO/OLE ones? Konrad
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index c51647e37df8..a538559caaa0 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1665,7 +1665,7 @@ static int __alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate, if (ret < 0) return ret; - regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l); + regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK, l); regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a); /* Latch the PLL input */
In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL register using regmap_write() API in __alpha_pll_trion_set_rate callback will override LUCID EVO PLL initial configuration related to PLL_CAL_L_VAL bit fields in PLL_L_VAL register. Observed random PLL lock failures during PLL enable due to such override in PLL calibration value. Use regmap_update_bits() with L_VAL bitfield mask instead of regmap_write() API to update only PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback. Fixes: 260e36606a03 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces") Cc: stable@vger.kernel.org Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- drivers/clk/qcom/clk-alpha-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)