diff mbox series

[1/2] usb: dwc3: core: add p3p2tranok quirk

Message ID 20240601092646.52139-1-joswang1221@gmail.com
State Superseded
Headers show
Series [1/2] usb: dwc3: core: add p3p2tranok quirk | expand

Commit Message

joswang June 1, 2024, 9:26 a.m. UTC
From: joswang <joswang@lenovo.com>

In the case of enable hibernation, there is an issue with
the DWC31 2.00a and earlier versions where the controller
link power state transition from P3/P3CPM/P4 to P2 may take
longer than expected, ultimately resulting in the hibernation
D3 entering time exceeding the expected 10ms.

Synopsys workaround:
If the PHY supports direct P3 to P2 transition, program
GUSB3PIPECTL.P3P2Tran0K=1. However, note that as per PIPE4
Specification, direct transition from P3 to P2 is illegal.

Therefore, adding p3p2tranok quirk for workaround hibernation
D3 exceeded the expected entry time.

Signed-off-by: joswang <joswang@lenovo.com>
---
 drivers/usb/dwc3/core.c | 5 +++++
 drivers/usb/dwc3/core.h | 4 ++++
 2 files changed, 9 insertions(+)

Comments

Greg Kroah-Hartman June 12, 2024, 5:04 p.m. UTC | #1
On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> From: Jos Wang <joswang@lenovo.com>
> 
> This is a workaround for STAR 4846132, which only affects
> DWC_usb31 version2.00a operating in host mode.
> 
> There is a problem in DWC_usb31 version 2.00a operating
> in host mode that would cause a CSR read timeout When CSR
> read coincides with RAM Clock Gating Entry. By disable
> Clock Gating, sacrificing power consumption for normal
> operation.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Jos Wang <joswang@lenovo.com>
> ---
> v1 -> v2:
> - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
>   this patch does not make any changes
> v2 -> v3:
> - code refactor
> - modify comment, add STAR number, workaround applied in host mode
> - modify commit message, add STAR number, workaround applied in host mode
> - modify Author Jos Wang
> v3 -> v4:
> - modify commit message, add Cc: stable@vger.kernel.org

This thread is crazy, look at:
	https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/
for how it looks.  How do I pick out the proper patches to review/apply
there at all?  What would you do if you were in my position except just
delete the whole thing?

Just properly submit new versions of patches (hint, without the ','), as
the documentation file says to, as new threads each time, with all
commits, and all should be fine.

We even have tools that can do this for you semi-automatically, why not
use them?

thanks,

greg k-h
Conor Dooley June 12, 2024, 5:13 p.m. UTC | #2
On Wed, Jun 12, 2024 at 07:04:28PM +0200, Greg KH wrote:
> On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > From: Jos Wang <joswang@lenovo.com>
> > 
> > This is a workaround for STAR 4846132, which only affects
> > DWC_usb31 version2.00a operating in host mode.
> > 
> > There is a problem in DWC_usb31 version 2.00a operating
> > in host mode that would cause a CSR read timeout When CSR
> > read coincides with RAM Clock Gating Entry. By disable
> > Clock Gating, sacrificing power consumption for normal
> > operation.
> > 
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > ---
> > v1 -> v2:
> > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> >   this patch does not make any changes
> > v2 -> v3:
> > - code refactor
> > - modify comment, add STAR number, workaround applied in host mode
> > - modify commit message, add STAR number, workaround applied in host mode
> > - modify Author Jos Wang
> > v3 -> v4:
> > - modify commit message, add Cc: stable@vger.kernel.org
> 
> This thread is crazy, look at:
> 	https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/
> for how it looks.  How do I pick out the proper patches to review/apply
> there at all?  What would you do if you were in my position except just
> delete the whole thing?

I usually wouldn't admit to it, cos it means more for Rob or Krzysztof
to look at, but deleting the thread is exactly what I did for the
dt-binding part of it that I got sent.
Krzysztof Kozlowski June 13, 2024, 6:17 a.m. UTC | #3
On 12/06/2024 17:23, joswang wrote:
>  
> +  snps,p2p3tranok-quirk:
> +    description:
> +      When set, the controller transitions directly from phy power state
> +      P2 to P3 or from state P3 to P2. Note that this can only be set
> +      if the USB3 PHY supports direct p3 to p2 or p2 to p3 conversion.
> +    type: boolean

Hm? You respond to feedback and, without waiting for my answer,
immediately send new version?

No. Read feedback on your previous version. Drop the quirk.

Best regards,
Krzysztof
joswang June 13, 2024, 11:46 a.m. UTC | #4
On Thu, Jun 13, 2024 at 1:04 AM Greg KH <gregkh@linuxfoundation.org> wrote:
>
> On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > From: Jos Wang <joswang@lenovo.com>
> >
> > This is a workaround for STAR 4846132, which only affects
> > DWC_usb31 version2.00a operating in host mode.
> >
> > There is a problem in DWC_usb31 version 2.00a operating
> > in host mode that would cause a CSR read timeout When CSR
> > read coincides with RAM Clock Gating Entry. By disable
> > Clock Gating, sacrificing power consumption for normal
> > operation.
> >
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > ---
> > v1 -> v2:
> > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> >   this patch does not make any changes
> > v2 -> v3:
> > - code refactor
> > - modify comment, add STAR number, workaround applied in host mode
> > - modify commit message, add STAR number, workaround applied in host mode
> > - modify Author Jos Wang
> > v3 -> v4:
> > - modify commit message, add Cc: stable@vger.kernel.org
>
> This thread is crazy, look at:
>         https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/
> for how it looks.  How do I pick out the proper patches to review/apply
> there at all?  What would you do if you were in my position except just
> delete the whole thing?
>
> Just properly submit new versions of patches (hint, without the ','), as
> the documentation file says to, as new threads each time, with all
> commits, and all should be fine.
>
> We even have tools that can do this for you semi-automatically, why not
> use them?
>
> thanks,
>
> greg k-h

We apologize for any inconvenience this may cause.
The following incorrect operation caused the problem you mentioned:
git send-email --in-reply-to command sends the new version patch
git format-patch --subject-prefix='PATCH v3

Should I resend the v5 patch now?
joswang June 13, 2024, 1:19 p.m. UTC | #5
On Thu, Jun 13, 2024 at 2:17 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 12/06/2024 17:23, joswang wrote:
> >
> > +  snps,p2p3tranok-quirk:
> > +    description:
> > +      When set, the controller transitions directly from phy power state
> > +      P2 to P3 or from state P3 to P2. Note that this can only be set
> > +      if the USB3 PHY supports direct p3 to p2 or p2 to p3 conversion.
> > +    type: boolean
>
> Hm? You respond to feedback and, without waiting for my answer,
> immediately send new version?
>
> No. Read feedback on your previous version. Drop the quirk.
>
> Best regards,
> Krzysztof
>

Thank you for your help in reviewing the code.
Sorry, I submitted three patches in total. Patch1 (the current patch)
and patch2 solve one case, and patch3 solves another case. Because
patch3 needs to submit a new version, I resubmitted v3 and v4
versions.
Patch2 is under review, and there is no clear conclusion. For now,
patch1 does not need to be paid attention to. I will notify you when
patch2 has a clear conclusion.

Thanks,

Jos Wang
Krzysztof Kozlowski June 13, 2024, 2:03 p.m. UTC | #6
On 13/06/2024 15:19, joswang wrote:
> On Thu, Jun 13, 2024 at 2:17 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 12/06/2024 17:23, joswang wrote:
>>>
>>> +  snps,p2p3tranok-quirk:
>>> +    description:
>>> +      When set, the controller transitions directly from phy power state
>>> +      P2 to P3 or from state P3 to P2. Note that this can only be set
>>> +      if the USB3 PHY supports direct p3 to p2 or p2 to p3 conversion.
>>> +    type: boolean
>>
>> Hm? You respond to feedback and, without waiting for my answer,
>> immediately send new version?
>>
>> No. Read feedback on your previous version. Drop the quirk.
>>
>> Best regards,
>> Krzysztof
>>
> 
> Thank you for your help in reviewing the code.
> Sorry, I submitted three patches in total. Patch1 (the current patch)
> and patch2 solve one case, and patch3 solves another case. Because
> patch3 needs to submit a new version, I resubmitted v3 and v4
> versions.
> Patch2 is under review, and there is no clear conclusion. For now,
> patch1 does not need to be paid attention to. I will notify you when
> patch2 has a clear conclusion.

This does no work like this.

Implement feedback and send new version of entire patchset *ONCE* there
is conclusion. Sending new version of some parts ignoring feedback or
skipping conclusion is not the way.

Sorry.

Still drop.

Or in case we still have here misunderstanding - so far it looks like: NAK

Best regards,
Krzysztof
Thinh Nguyen June 18, 2024, 12:05 a.m. UTC | #7
On Thu, Jun 13, 2024, joswang wrote:
> On Thu, Jun 13, 2024 at 1:04 AM Greg KH <gregkh@linuxfoundation.org> wrote:
> >
> > On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > > From: Jos Wang <joswang@lenovo.com>
> > >
> > > This is a workaround for STAR 4846132, which only affects
> > > DWC_usb31 version2.00a operating in host mode.
> > >
> > > There is a problem in DWC_usb31 version 2.00a operating
> > > in host mode that would cause a CSR read timeout When CSR
> > > read coincides with RAM Clock Gating Entry. By disable
> > > Clock Gating, sacrificing power consumption for normal
> > > operation.
> > >
> > > Cc: stable@vger.kernel.org
> > > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > > ---
> > > v1 -> v2:
> > > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> > >   this patch does not make any changes
> > > v2 -> v3:
> > > - code refactor
> > > - modify comment, add STAR number, workaround applied in host mode
> > > - modify commit message, add STAR number, workaround applied in host mode
> > > - modify Author Jos Wang
> > > v3 -> v4:
> > > - modify commit message, add Cc: stable@vger.kernel.org
> >
> > This thread is crazy, look at:
> >         https://urldefense.com/v3/__https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/__;!!A4F2R9G_pg!a29V9NsG_rMKPnub-JtIe5I_lAoJmzK8dgo3UK-qD_xpT_TOgyPb6LkEMkIsijsDKIgdxB_QVLW_MwtdQLnyvOujOA$ 
> > for how it looks.  How do I pick out the proper patches to review/apply
> > there at all?  What would you do if you were in my position except just
> > delete the whole thing?
> >
> > Just properly submit new versions of patches (hint, without the ','), as
> > the documentation file says to, as new threads each time, with all
> > commits, and all should be fine.
> >
> > We even have tools that can do this for you semi-automatically, why not
> > use them?
> >
> > thanks,
> >
> > greg k-h
> 
> We apologize for any inconvenience this may cause.
> The following incorrect operation caused the problem you mentioned:
> git send-email --in-reply-to command sends the new version patch
> git format-patch --subject-prefix='PATCH v3
> 
> Should I resend the v5 patch now?

Please send this as a stand-alone patch outside of the series as v5. (ie.
remove the "3/3"). I still need to review the other issue of the series.

Thanks,
Thinh
Jung Daehwan June 18, 2024, 4:24 a.m. UTC | #8
On Tue, Jun 18, 2024 at 12:05:05AM +0000, Thinh Nguyen wrote:
> On Thu, Jun 13, 2024, joswang wrote:
> > On Thu, Jun 13, 2024 at 1:04 AM Greg KH <gregkh@linuxfoundation.org> wrote:
> > >
> > > On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > > > From: Jos Wang <joswang@lenovo.com>
> > > >
> > > > This is a workaround for STAR 4846132, which only affects
> > > > DWC_usb31 version2.00a operating in host mode.
> > > >
> > > > There is a problem in DWC_usb31 version 2.00a operating
> > > > in host mode that would cause a CSR read timeout When CSR
> > > > read coincides with RAM Clock Gating Entry. By disable
> > > > Clock Gating, sacrificing power consumption for normal
> > > > operation.
> > > >
> > > > Cc: stable@vger.kernel.org
> > > > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > > > ---
> > > > v1 -> v2:
> > > > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> > > >   this patch does not make any changes
> > > > v2 -> v3:
> > > > - code refactor
> > > > - modify comment, add STAR number, workaround applied in host mode
> > > > - modify commit message, add STAR number, workaround applied in host mode
> > > > - modify Author Jos Wang
> > > > v3 -> v4:
> > > > - modify commit message, add Cc: stable@vger.kernel.org
> > >
> > > This thread is crazy, look at:
> > >         https://urldefense.com/v3/__https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/__;!!A4F2R9G_pg!a29V9NsG_rMKPnub-JtIe5I_lAoJmzK8dgo3UK-qD_xpT_TOgyPb6LkEMkIsijsDKIgdxB_QVLW_MwtdQLnyvOujOA$ 
> > > for how it looks.  How do I pick out the proper patches to review/apply
> > > there at all?  What would you do if you were in my position except just
> > > delete the whole thing?
> > >
> > > Just properly submit new versions of patches (hint, without the ','), as
> > > the documentation file says to, as new threads each time, with all
> > > commits, and all should be fine.
> > >
> > > We even have tools that can do this for you semi-automatically, why not
> > > use them?
> > >
> > > thanks,
> > >
> > > greg k-h
> > 
> > We apologize for any inconvenience this may cause.
> > The following incorrect operation caused the problem you mentioned:
> > git send-email --in-reply-to command sends the new version patch
> > git format-patch --subject-prefix='PATCH v3
> > 
> > Should I resend the v5 patch now?
> 
> Please send this as a stand-alone patch outside of the series as v5. (ie.
> remove the "3/3"). I still need to review the other issue of the series.
> 
> Thanks,
> Thinh

Hi Thinh,

We faced similar issue on DRD mode operating as device.
Could you check it internally?
Case: 01635304

Best Regards,
Jung Daehwan
joswang June 18, 2024, 12:47 p.m. UTC | #9
On Tue, Jun 18, 2024 at 8:05 AM Thinh Nguyen <Thinh.Nguyen@synopsys.com> wrote:
>
> On Thu, Jun 13, 2024, joswang wrote:
> > On Thu, Jun 13, 2024 at 1:04 AM Greg KH <gregkh@linuxfoundation.org> wrote:
> > >
> > > On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > > > From: Jos Wang <joswang@lenovo.com>
> > > >
> > > > This is a workaround for STAR 4846132, which only affects
> > > > DWC_usb31 version2.00a operating in host mode.
> > > >
> > > > There is a problem in DWC_usb31 version 2.00a operating
> > > > in host mode that would cause a CSR read timeout When CSR
> > > > read coincides with RAM Clock Gating Entry. By disable
> > > > Clock Gating, sacrificing power consumption for normal
> > > > operation.
> > > >
> > > > Cc: stable@vger.kernel.org
> > > > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > > > ---
> > > > v1 -> v2:
> > > > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> > > >   this patch does not make any changes
> > > > v2 -> v3:
> > > > - code refactor
> > > > - modify comment, add STAR number, workaround applied in host mode
> > > > - modify commit message, add STAR number, workaround applied in host mode
> > > > - modify Author Jos Wang
> > > > v3 -> v4:
> > > > - modify commit message, add Cc: stable@vger.kernel.org
> > >
> > > This thread is crazy, look at:
> > >         https://urldefense.com/v3/__https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/__;!!A4F2R9G_pg!a29V9NsG_rMKPnub-JtIe5I_lAoJmzK8dgo3UK-qD_xpT_TOgyPb6LkEMkIsijsDKIgdxB_QVLW_MwtdQLnyvOujOA$
> > > for how it looks.  How do I pick out the proper patches to review/apply
> > > there at all?  What would you do if you were in my position except just
> > > delete the whole thing?
> > >
> > > Just properly submit new versions of patches (hint, without the ','), as
> > > the documentation file says to, as new threads each time, with all
> > > commits, and all should be fine.
> > >
> > > We even have tools that can do this for you semi-automatically, why not
> > > use them?
> > >
> > > thanks,
> > >
> > > greg k-h
> >
> > We apologize for any inconvenience this may cause.
> > The following incorrect operation caused the problem you mentioned:
> > git send-email --in-reply-to command sends the new version patch
> > git format-patch --subject-prefix='PATCH v3
> >
> > Should I resend the v5 patch now?
>
> Please send this as a stand-alone patch outside of the series as v5. (ie.
> remove the "3/3"). I still need to review the other issue of the series.
>
> Thanks,
> Thinh

This patch has been sent separately, please help review it.

Thanks
Jos Wang
Greg Kroah-Hartman June 18, 2024, 1:38 p.m. UTC | #10
On Tue, Jun 18, 2024 at 08:47:38PM +0800, joswang wrote:
> On Tue, Jun 18, 2024 at 8:05 AM Thinh Nguyen <Thinh.Nguyen@synopsys.com> wrote:
> >
> > On Thu, Jun 13, 2024, joswang wrote:
> > > On Thu, Jun 13, 2024 at 1:04 AM Greg KH <gregkh@linuxfoundation.org> wrote:
> > > >
> > > > On Wed, Jun 12, 2024 at 11:39:22PM +0800, joswang wrote:
> > > > > From: Jos Wang <joswang@lenovo.com>
> > > > >
> > > > > This is a workaround for STAR 4846132, which only affects
> > > > > DWC_usb31 version2.00a operating in host mode.
> > > > >
> > > > > There is a problem in DWC_usb31 version 2.00a operating
> > > > > in host mode that would cause a CSR read timeout When CSR
> > > > > read coincides with RAM Clock Gating Entry. By disable
> > > > > Clock Gating, sacrificing power consumption for normal
> > > > > operation.
> > > > >
> > > > > Cc: stable@vger.kernel.org
> > > > > Signed-off-by: Jos Wang <joswang@lenovo.com>
> > > > > ---
> > > > > v1 -> v2:
> > > > > - add "dt-bindings: usb: dwc3: Add snps,p2p3tranok quirk" patch,
> > > > >   this patch does not make any changes
> > > > > v2 -> v3:
> > > > > - code refactor
> > > > > - modify comment, add STAR number, workaround applied in host mode
> > > > > - modify commit message, add STAR number, workaround applied in host mode
> > > > > - modify Author Jos Wang
> > > > > v3 -> v4:
> > > > > - modify commit message, add Cc: stable@vger.kernel.org
> > > >
> > > > This thread is crazy, look at:
> > > >         https://urldefense.com/v3/__https://lore.kernel.org/all/20240612153922.2531-1-joswang1221@gmail.com/__;!!A4F2R9G_pg!a29V9NsG_rMKPnub-JtIe5I_lAoJmzK8dgo3UK-qD_xpT_TOgyPb6LkEMkIsijsDKIgdxB_QVLW_MwtdQLnyvOujOA$
> > > > for how it looks.  How do I pick out the proper patches to review/apply
> > > > there at all?  What would you do if you were in my position except just
> > > > delete the whole thing?
> > > >
> > > > Just properly submit new versions of patches (hint, without the ','), as
> > > > the documentation file says to, as new threads each time, with all
> > > > commits, and all should be fine.
> > > >
> > > > We even have tools that can do this for you semi-automatically, why not
> > > > use them?
> > > >
> > > > thanks,
> > > >
> > > > greg k-h
> > >
> > > We apologize for any inconvenience this may cause.
> > > The following incorrect operation caused the problem you mentioned:
> > > git send-email --in-reply-to command sends the new version patch
> > > git format-patch --subject-prefix='PATCH v3
> > >
> > > Should I resend the v5 patch now?
> >
> > Please send this as a stand-alone patch outside of the series as v5. (ie.
> > remove the "3/3"). I still need to review the other issue of the series.
> >
> > Thanks,
> > Thinh
> 
> This patch has been sent separately, please help review it.

You too can help review other commits on the list to reduce the
maintainer load here.  Please do so in order to insure that there is
time to review your changes as well.

thanks,

greg k-h
Thinh Nguyen June 18, 2024, 9:36 p.m. UTC | #11
On Tue, Jun 18, 2024, Jung Daehwan wrote:
> 
> Hi Thinh,
> 
> We faced similar issue on DRD mode operating as device.
> Could you check it internally?
> Case: 01635304
> 

Hi Jung,

It's a separate case. Please check through our support channel to avoid
any miscommunication/disconnect.

Thanks,
Thinh
Jung Daehwan June 19, 2024, 1:34 a.m. UTC | #12
On Tue, Jun 18, 2024 at 09:36:03PM +0000, Thinh Nguyen wrote:
> On Tue, Jun 18, 2024, Jung Daehwan wrote:
> > 
> > Hi Thinh,
> > 
> > We faced similar issue on DRD mode operating as device.
> > Could you check it internally?
> > Case: 01635304
> > 
> 
> Hi Jung,
> 
> It's a separate case. Please check through our support channel to avoid
> any miscommunication/disconnect.
> 
> Thanks,
> Thinh

Thanks for the check. I will check through the support channel again.

Best Regards,
Jung Daehwan
diff mbox series

Patch

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 7ee61a89520b..3a8fbc2d6b99 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -666,6 +666,9 @@  static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index)
 	if (dwc->dis_del_phy_power_chg_quirk)
 		reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
 
+	if (dwc->p2p3tranok_quirk)
+		reg |= DWC3_GUSB3PIPECTL_P3P2TRANOK;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg);
 
 	return 0;
@@ -1715,6 +1718,8 @@  static void dwc3_get_properties(struct dwc3 *dwc)
 
 	dwc->dis_split_quirk = device_property_read_bool(dev,
 				"snps,dis-split-quirk");
+	dwc->p2p3tranok_quirk = device_property_read_bool(dev,
+				"snps,p2p3tranok-quirk");
 
 	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
 	dwc->tx_de_emphasis = tx_de_emphasis;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 3781c736c1a1..2810dce8b42e 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -327,6 +327,7 @@ 
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_EN	DWC3_GUSB3PIPECTL_DEP1P2P3(1)
 #define DWC3_GUSB3PIPECTL_DEPOCHANGE	BIT(18)
 #define DWC3_GUSB3PIPECTL_SUSPHY	BIT(17)
+#define DWC3_GUSB3PIPECTL_P3P2TRANOK	BIT(11)
 #define DWC3_GUSB3PIPECTL_LFPSFILT	BIT(9)
 #define DWC3_GUSB3PIPECTL_RX_DETOPOLL	BIT(8)
 #define DWC3_GUSB3PIPECTL_TX_DEEPH_MASK	DWC3_GUSB3PIPECTL_TX_DEEPH(3)
@@ -1132,6 +1133,8 @@  struct dwc3_scratchpad_array {
  *			instances in park mode.
  * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed
  *			instances in park mode.
+ * @p2p3tranok_quirk: set if Controller transitions directly from phy
+ *			power state P2 to P3 or from state P3 to P2.
  * @gfladj_refclk_lpm_sel: set if we need to enable SOF/ITP counter
  *                          running based on ref_clk
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
@@ -1361,6 +1364,7 @@  struct dwc3 {
 	unsigned		ulpi_ext_vbus_drv:1;
 	unsigned		parkmode_disable_ss_quirk:1;
 	unsigned		parkmode_disable_hs_quirk:1;
+	unsigned		p2p3tranok_quirk:1;
 	unsigned		gfladj_refclk_lpm_sel:1;
 
 	unsigned		tx_de_emphasis_quirk:1;