Message ID | 20240605122729.24283-2-brgl@bgdev.pl |
---|---|
State | New |
Headers | show |
Series | arm64: dts: qcom: add WiFi modules for several platforms | expand |
On Wed, Jun 05, 2024 at 02:27:26PM GMT, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Describe the ath12k WLAN on-board the WCN7850 module present on the > board. > > [Neil: authored the initial version of the change] > > Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > Tested-by: Amit Pundir <amit.pundir@linaro.org> > Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 97 +++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > 2 files changed, 98 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index c55a818af935..c9d3c0549ab5 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -1784,7 +1784,7 @@ pcie0: pcie@1c00000 { > > status = "disabled"; > > - pcie@0 { > + pcieport0: pcie@0 { Ideally this should come as a separate commit, with proper Fixes tag, changing all pcie ports at once. > device_type = "pci"; > reg = <0x0 0x0 0x0 0x0 0x0>; > bus-range = <0x01 0xff>; > -- > 2.40.1 >
On Mon, Jun 17, 2024 at 11:32 AM Dmitry Baryshkov <dmitry.baryshkov@linaro.org> wrote: > > On Wed, Jun 05, 2024 at 02:27:26PM GMT, Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > > Describe the ath12k WLAN on-board the WCN7850 module present on the > > board. > > > > [Neil: authored the initial version of the change] > > > > Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > > Tested-by: Amit Pundir <amit.pundir@linaro.org> > > Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 97 +++++++++++++++++++++++++ > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > > 2 files changed, 98 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > index c55a818af935..c9d3c0549ab5 100644 > > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > @@ -1784,7 +1784,7 @@ pcie0: pcie@1c00000 { > > > > status = "disabled"; > > > > - pcie@0 { > > + pcieport0: pcie@0 { > > Ideally this should come as a separate commit, with proper Fixes tag, > changing all pcie ports at once. > Why? this is not a bug, we didn't need this label until now. Bart > > device_type = "pci"; > > reg = <0x0 0x0 0x0 0x0 0x0>; > > bus-range = <0x01 0xff>; > > -- > > 2.40.1 > > > > -- > With best wishes > Dmitry
On Mon, Jun 17, 2024 at 11:53:27AM GMT, Bartosz Golaszewski wrote: > On Mon, Jun 17, 2024 at 11:32 AM Dmitry Baryshkov > <dmitry.baryshkov@linaro.org> wrote: > > > > On Wed, Jun 05, 2024 at 02:27:26PM GMT, Bartosz Golaszewski wrote: > > > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > > > > Describe the ath12k WLAN on-board the WCN7850 module present on the > > > board. > > > > > > [Neil: authored the initial version of the change] > > > > > > Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org> > > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > > > Tested-by: Amit Pundir <amit.pundir@linaro.org> > > > Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD > > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > > --- > > > arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 97 +++++++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > > > 2 files changed, 98 insertions(+), 1 deletion(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > index c55a818af935..c9d3c0549ab5 100644 > > > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > > > @@ -1784,7 +1784,7 @@ pcie0: pcie@1c00000 { > > > > > > status = "disabled"; > > > > > > - pcie@0 { > > > + pcieport0: pcie@0 { > > > > Ideally this should come as a separate commit, with proper Fixes tag, > > changing all pcie ports at once. > > > > Why? this is not a bug, we didn't need this label until now. Oh, I'm blind. Plese excuse me. I've read it as if you wre changing the node name. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > Bart > > > > device_type = "pci"; > > > reg = <0x0 0x0 0x0 0x0 0x0>; > > > bus-range = <0x01 0xff>; > > > -- > > > 2.40.1 > > > > > > > -- > > With best wishes > > Dmitry
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index d27820fb5fc0..361b0792db4f 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -214,6 +214,68 @@ vph_pwr: vph-pwr-regulator { regulator-always-on; regulator-boot-on; }; + + wcn7850-pmu { + compatible = "qcom,wcn7850-pmu"; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_en>, <&pmk8550_sleep_clk>; + + wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>; + /* + * TODO Add bt-enable-gpios once the Bluetooth driver is + * converted to using the power sequencer. + */ + + vdd-supply = <&vreg_s5g_0p85>; + vddio-supply = <&vreg_l15b_1p8>; + vddaon-supply = <&vreg_s2g_0p85>; + vdddig-supply = <&vreg_s4e_0p95>; + vddrfa1p2-supply = <&vreg_s4g_1p25>; + vddrfa1p8-supply = <&vreg_s6g_1p86>; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name = "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name = "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name = "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name = "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name = "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name = "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name = "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name = "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name = "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name = "vreg_pmu_pcie_1p8"; + }; + }; + }; }; &apps_rsc { @@ -808,6 +870,23 @@ &pcie0 { status = "okay"; }; +&pcieport0 { + wifi@0 { + compatible = "pci17cb,1107"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + + vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; + vddaon-supply = <&vreg_pmu_aon_0p59>; + vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; + vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; + }; +}; + &pcie0_phy { vdda-phy-supply = <&vreg_l1e_0p88>; vdda-pll-supply = <&vreg_l3e_1p2>; @@ -891,6 +970,17 @@ &pon_resin { status = "okay"; }; +&pmk8550_gpios { + pmk8550_sleep_clk: sleep-clk-state { + pins = "gpio3"; + function = "func1"; + input-disable; + output-enable; + bias-disable; + power-source = <0>; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -1064,6 +1154,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wlan_en: wlan-en-state { + pins = "gpio80"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; }; &uart7 { diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index c55a818af935..c9d3c0549ab5 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1784,7 +1784,7 @@ pcie0: pcie@1c00000 { status = "disabled"; - pcie@0 { + pcieport0: pcie@0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>;