diff mbox series

i2c: piix4: Register SPDs

Message ID 20240530-piix4-spd-v1-1-9cbf1abebf41@weissschuh.net
State New
Headers show
Series i2c: piix4: Register SPDs | expand

Commit Message

Thomas Weißschuh May 30, 2024, 9:49 p.m. UTC
The piix4 I2C bus can carry SPDs, register them if present.

Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
---
For my test setup see [0].
While the spd5118 driver in that form shouldn't be probed this way, the
general principle holds true for the other SPD drivers.

Guenter offered to test it, too.

[0] https://lore.kernel.org/lkml/34a4292e-c4db-4b40-822e-b892e1444045@t-8ch.de/
---
 drivers/i2c/busses/Kconfig     | 1 +
 drivers/i2c/busses/i2c-piix4.c | 3 +++
 2 files changed, 4 insertions(+)


---
base-commit: 4a4be1ad3a6efea16c56615f31117590fd881358
change-id: 20240530-piix4-spd-39c156b22959

Best regards,

Comments

Guenter Roeck May 30, 2024, 11:10 p.m. UTC | #1
On 5/30/24 14:49, Thomas Weißschuh wrote:
> The piix4 I2C bus can carry SPDs, register them if present.
> 
> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
> ---
> For my test setup see [0].
> While the spd5118 driver in that form shouldn't be probed this way, the
> general principle holds true for the other SPD drivers.
> 
> Guenter offered to test it, too.
> 

Perfect. With this patch in place, I see:

[    6.679772] i2c i2c-0: Successfully instantiated SPD at 0x50
[    6.680341] i2c i2c-0: Successfully instantiated SPD at 0x51
[    6.680905] i2c i2c-0: Successfully instantiated SPD at 0x52
[    6.681466] i2c i2c-0: Successfully instantiated SPD at 0x53

on multiple AMD based systems with DDR4.

Tested-by: Guenter Roeck <linux@roeck-us.net>

Thanks!

Guenter
Wolfram Sang May 31, 2024, 9:33 a.m. UTC | #2
> Perfect. With this patch in place, I see:
> 
> [    6.679772] i2c i2c-0: Successfully instantiated SPD at 0x50
> [    6.680341] i2c i2c-0: Successfully instantiated SPD at 0x51
> [    6.680905] i2c i2c-0: Successfully instantiated SPD at 0x52
> [    6.681466] i2c i2c-0: Successfully instantiated SPD at 0x53
> 
> on multiple AMD based systems with DDR4.
> 
> Tested-by: Guenter Roeck <linux@roeck-us.net>

Yes, for DDR4 this should work out of the box.
diff mbox series

Patch

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index fe6e8a1bb607..ff66e883b348 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -195,6 +195,7 @@  config I2C_ISMT
 config I2C_PIIX4
 	tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
 	depends on PCI && HAS_IOPORT
+	select I2C_SMBUS
 	help
 	  If you say yes to this option, support will be included for the Intel
 	  PIIX4 family of mainboard I2C interfaces.  Specifically, the following
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 6a0392172b2f..f8d81f8c0cb3 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -29,6 +29,7 @@ 
 #include <linux/stddef.h>
 #include <linux/ioport.h>
 #include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
 #include <linux/slab.h>
 #include <linux/dmi.h>
 #include <linux/acpi.h>
@@ -982,6 +983,8 @@  static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
 		return retval;
 	}
 
+	i2c_register_spd(adap);
+
 	*padap = adap;
 	return 0;
 }