diff mbox series

arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge

Message ID 20240425071354.GA12900@hu-vvalluru-hyd.qualcomm.com
State Superseded
Headers show
Series arm64: dts: qcom: qcs6490-rb3gen2: enable hdmi bridge | expand

Commit Message

Prahlad Valluru April 25, 2024, 7:13 a.m. UTC 
Enable lt9611uxc bridge for qcs6490 rb3 gen2 platform.

Signed-off-by: Prahlad Valluru <quic_vvalluru@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 86 ++++++++++++++++++++
 1 file changed, 86 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index a085ff5b5fb2..ff963f94c0e3 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -51,6 +51,18 @@ 
 			};
 		};
 	};
+	
+	hdmi-connector {
+		compatible = "hdmi-connector";
+		label = "HDMI";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&lt9611_out>;
+			};
+		};
+	};
 
 	reserved-memory {
 		xbl_mem: xbl@80700000 {
@@ -530,6 +542,45 @@ 
 			   <GCC_WPSS_RSCP_CLK>;
 };
 
+&i2c0 {
+	clock-frequency = <400000>;
+	status = "okay";
+
+	lt9611_codec: hdmi-bridge@2b {
+		compatible = "lontium,lt9611uxc";
+		reg = <0x2b>;
+
+		interrupts-extended = <&tlmm 24 IRQ_TYPE_EDGE_FALLING>;
+		reset-gpios = <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>;
+
+		vcc-supply = <&vreg_l11c_2p8>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&lt9611_irq_pin &lt9611_rst_pin>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				lt9611_a: endpoint {
+					remote-endpoint = <&mdss_dsi0_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+
+				lt9611_out: endpoint {
+					remote-endpoint = <&hdmi_con>;
+				};
+			};
+		};
+	};
+};
+
 &i2c1 {
 	status = "okay";
 
@@ -602,6 +653,21 @@ 
 	status = "okay";
 };
 
+&mdss_dsi {
+        vdda-supply = <&vreg_l6b_1p2>;
+        status = "okay";
+};
+
+&mdss_dsi0_out {
+        remote-endpoint = <&lt9611_a>;
+        data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi_phy {
+        vdds-supply = <&vreg_l10c_0p88>;
+        status = "okay";
+};
+
 &qupv3_id_0 {
 	status = "okay";
 };
@@ -711,3 +777,23 @@ 
 	function = "gpio";
 	bias-disable;
 };
+
+&pm7250b_gpios {
+        lt9611_rst_pin: lt9611-rst-state {
+                pins = "gpio2";
+                function = "normal";
+
+                output-high;
+                input-disable;
+                power-source = <0>;
+        };
+};
+
+&tlmm {
+        lt9611_irq_pin: lt9611-irq {
+                pins = "gpio24";
+                function = "gpio";
+                drive-strength = <8>;
+                bias-disable;
+        };
+};