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[v2] i2c: Add asserts for second smbus i2c_start_transfer()

Message ID 1477323753-20768-1-git-send-email-minyard@acm.org
State New
Headers show

Commit Message

Corey Minyard Oct. 24, 2016, 3:42 p.m. UTC 
From: Corey Minyard <cminyard@mvista.com>


Some SMBus operations restart the transfer to convert from
write to read mode without an intervening i2c_end_transfer().
The second call cannot fail, so the return code is unchecked,
but this causes Coverity to complain.  So add some asserts
and documentation about this.

Signed-off-by: Corey Minyard <cminyard@mvista.com>

---
 hw/i2c/core.c  |  7 ++++++-
 hw/i2c/smbus.c | 12 +++++++++---
 2 files changed, 15 insertions(+), 4 deletions(-)

Changes since v1:

  * Fixed the comments, I should have run it through checkpatch.

  * Fixed the asserts to avoid side effects.

-- 
2.7.4

Comments

Peter Maydell Oct. 24, 2016, 3:50 p.m. UTC | #1 
On 24 October 2016 at 16:42,  <minyard@acm.org> wrote:
> From: Corey Minyard <cminyard@mvista.com>

>

> Some SMBus operations restart the transfer to convert from

> write to read mode without an intervening i2c_end_transfer().

> The second call cannot fail, so the return code is unchecked,

> but this causes Coverity to complain.  So add some asserts

> and documentation about this.

>

> Signed-off-by: Corey Minyard <cminyard@mvista.com>

> ---

>  hw/i2c/core.c  |  7 ++++++-

>  hw/i2c/smbus.c | 12 +++++++++---

>  2 files changed, 15 insertions(+), 4 deletions(-)

>

> Changes since v1:

>

>   * Fixed the comments, I should have run it through checkpatch.

>

>   * Fixed the asserts to avoid side effects.




Applied to target-arm.next, thanks.

-- PMM
diff mbox

Patch

diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index bd8f167..abd4c4c 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/core.c
@@ -88,7 +88,12 @@  int i2c_bus_busy(I2CBus *bus)
     return !QLIST_EMPTY(&bus->current_devs);
 }
 
-/* Returns non-zero if the address is not valid.  */
+/*
+ * Returns non-zero if the address is not valid.  If this is called
+ * again without an intervening i2c_end_transfer(), like in the SMBus
+ * case where the operation is switched from write to read, this
+ * function will not rescan the bus and thus cannot fail.
+ */
 /* TODO: Make this handle multiple masters.  */
 int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv)
 {
diff --git a/hw/i2c/smbus.c b/hw/i2c/smbus.c
index 3979b3d..5b4dd3e 100644
--- a/hw/i2c/smbus.c
+++ b/hw/i2c/smbus.c
@@ -248,7 +248,9 @@  int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
         return -1;
     }
     i2c_send(bus, command);
-    i2c_start_transfer(bus, addr, 1);
+    if (i2c_start_transfer(bus, addr, 1)) {
+        assert(0);
+    }
     data = i2c_recv(bus);
     i2c_nack(bus);
     i2c_end_transfer(bus);
@@ -273,7 +275,9 @@  int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
         return -1;
     }
     i2c_send(bus, command);
-    i2c_start_transfer(bus, addr, 1);
+    if (i2c_start_transfer(bus, addr, 1)) {
+        assert(0);
+    }
     data = i2c_recv(bus);
     data |= i2c_recv(bus) << 8;
     i2c_nack(bus);
@@ -302,7 +306,9 @@  int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data)
         return -1;
     }
     i2c_send(bus, command);
-    i2c_start_transfer(bus, addr, 1);
+    if (i2c_start_transfer(bus, addr, 1)) {
+        assert(0);
+    }
     len = i2c_recv(bus);
     if (len > 32) {
         len = 0;