| Message ID | 20240402014706.3969151-1-harisokn@amazon.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] arm64: Add TIF_POLLING_NRFLAG | expand |
On Mon, Apr 01, 2024 at 08:47:05PM -0500, Haris Okanovic wrote: > Perform an exclusive load, which atomically loads a word and arms the > execusive monitor to enable wfe() polling of an address. > > Adding this macro in preparation for an arm64 cpuidle driver which > supports a wfe() based polling state. > > https://developer.arm.com/documentation/dht0008/a/arm-synchronization-primitives/exclusive-accesses/exclusive-monitors > > Signed-off-by: Haris Okanovic <harisokn@amazon.com> > --- > arch/arm64/include/asm/readex.h | 46 +++++++++++++++++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 arch/arm64/include/asm/readex.h > > diff --git a/arch/arm64/include/asm/readex.h b/arch/arm64/include/asm/readex.h > new file mode 100644 > index 000000000000..51963c3107e1 > --- /dev/null > +++ b/arch/arm64/include/asm/readex.h > @@ -0,0 +1,46 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Based on arch/arm64/include/asm/rwonce.h > + * > + * Copyright (C) 2020 Google LLC. > + * Copyright (C) 2024 Amazon.com, Inc. or its affiliates. > + */ > + > +#ifndef __ASM_READEX_H > +#define __ASM_READEX_H > + > +#define __LOAD_EX(sfx, regs...) "ldaxr" #sfx "\t" #regs > + > +#define __READ_ONCE_EX(x) \ > +({ \ > + typeof(&(x)) __x = &(x); \ > + int atomic = 1; \ > + union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \ > + switch (sizeof(x)) { \ > + case 1: \ > + asm volatile(__LOAD_EX(b, %w0, %1) \ > + : "=r" (*(__u8 *)__u.__c) \ > + : "Q" (*__x) : "memory"); \ > + break; \ > + case 2: \ > + asm volatile(__LOAD_EX(h, %w0, %1) \ > + : "=r" (*(__u16 *)__u.__c) \ > + : "Q" (*__x) : "memory"); \ > + break; \ > + case 4: \ > + asm volatile(__LOAD_EX(, %w0, %1) \ > + : "=r" (*(__u32 *)__u.__c) \ > + : "Q" (*__x) : "memory"); \ > + break; \ > + case 8: \ > + asm volatile(__LOAD_EX(, %0, %1) \ > + : "=r" (*(__u64 *)__u.__c) \ > + : "Q" (*__x) : "memory"); \ > + break; \ > + default: \ > + atomic = 0; \ > + } \ > + atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\ > +}) Why can't you use the existing smp_cond_load_relaxed() or smp_cond_load_acquire()? I don't believe this is necessary. Mark.
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index e72a3bf9e563..ab22c7d1967e 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -81,6 +81,7 @@ void arch_setup_new_exec(void); #define TIF_SME 27 /* SME in use */ #define TIF_SME_VL_INHERIT 28 /* Inherit SME vl_onexec across exec */ #define TIF_KERNEL_FPSTATE 29 /* Task is in a kernel mode FPSIMD section */ +#define TIF_POLLING_NRFLAG 30 #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -97,6 +98,7 @@ void arch_setup_new_exec(void); #define _TIF_SVE (1 << TIF_SVE) #define _TIF_MTE_ASYNC_FAULT (1 << TIF_MTE_ASYNC_FAULT) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) +#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \
TIF_POLLING_NRFLAG was removed from arm64 as there were no polling idle states. Add back TIF_POLLING_NRFLAG in preparation for an arm64 cpuidle driver which supports polling. Signed-off-by: Haris Okanovic <harisokn@amazon.com> --- arch/arm64/include/asm/thread_info.h | 2 ++ 1 file changed, 2 insertions(+)