| Message ID | 20240328-a619-hbb-v1-1-cd135e2d22a7@fairphone.com |
|---|---|
| State | Accepted |
| Commit | 9dc23cba0927d09cb481da064c8413eb9df42e2b |
| Headers | show |
| Series | drm/msm/adreno: Set highest_bank_bit for A619 | expand |
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 0674aca0f8a3..cf0b1de1c071 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1377,6 +1377,10 @@ static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) if (adreno_is_a618(gpu)) gpu->ubwc_config.highest_bank_bit = 14; + if (adreno_is_a619(gpu)) + /* TODO: Should be 14 but causes corruption at e.g. 1920x1200 on DP */ + gpu->ubwc_config.highest_bank_bit = 13; + if (adreno_is_a619_holi(gpu)) gpu->ubwc_config.highest_bank_bit = 13;
The default highest_bank_bit of 15 didn't seem to cause issues so far but downstream defines it to be 14. But similar to [0] leaving it on 14 (or 15 for that matter) causes some corruption issues with some resolutions with DisplayPort, like 1920x1200. So set it to 13 for now so that there's no screen corruption. [0] commit 6a0dbcd20ef2 ("drm/msm/a6xx: set highest_bank_bit to 13 for a610") Fixes: b7616b5c69e6 ("drm/msm/adreno: Add A619 support") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> --- @Akhil: Dmitry & Abhinav said I should ping you specifically to take a look if you have an idea why HBB=13 works but HBB=14 causes issues. --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++ 1 file changed, 4 insertions(+) --- base-commit: d5a436a7b5958caa6fc0dcda6c842f9d951be73b change-id: 20240328-a619-hbb-a3b6bda9e4a7 Best regards,