diff mbox series

qcom_defconfig: Enable ethernet and I2C support

Message ID 20240219084144.2881155-1-sumit.garg@linaro.org
State Accepted
Commit b621dcd16246d5271ae000701c50b2deaac3feab
Headers show
Series qcom_defconfig: Enable ethernet and I2C support | expand

Commit Message

Sumit Garg Feb. 19, 2024, 8:41 a.m. UTC
QCS404 supports Synopsys Designware Ethernet QOS IP and we already have
the corresponding glue layer present upstream as:
drivers/net/dwc_eth_qos_qcom.c. So enable corresponding support.

Along with that it is possible for Qualcomm platforms to retrieve MAC
address from I2C eeprom present on board. So enable corresponding
support as well.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---

This patch based upon Caleb's series [1].

[1] https://lore.kernel.org/all/20240215-b4-qcom-common-target-v4-0-ed06355c634a@linaro.org/

 configs/qcom_defconfig | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

Comments

Sumit Garg March 5, 2024, 1:47 p.m. UTC | #1
On Mon, 19 Feb 2024 at 14:11, Sumit Garg <sumit.garg@linaro.org> wrote:
>
> QCS404 supports Synopsys Designware Ethernet QOS IP and we already have
> the corresponding glue layer present upstream as:
> drivers/net/dwc_eth_qos_qcom.c. So enable corresponding support.
>
> Along with that it is possible for Qualcomm platforms to retrieve MAC
> address from I2C eeprom present on board. So enable corresponding
> support as well.
>
> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> ---
>
> This patch based upon Caleb's series [1].
>
> [1] https://lore.kernel.org/all/20240215-b4-qcom-common-target-v4-0-ed06355c634a@linaro.org/
>

Gentle ping.

-Sumit

>  configs/qcom_defconfig | 24 +++++++++++++++++++++++-
>  1 file changed, 23 insertions(+), 1 deletion(-)
>
> diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
> index 222db6448aba..cbc612b44bd9 100644
> --- a/configs/qcom_defconfig
> +++ b/configs/qcom_defconfig
> @@ -26,7 +26,6 @@ CONFIG_CMD_USB=y
>  CONFIG_CMD_CAT=y
>  CONFIG_CMD_BMP=y
>  CONFIG_CMD_LOG=y
> -# CONFIG_NET is not set
>  CONFIG_BUTTON_QCOM_PMIC=y
>  CONFIG_CLK=y
>  CONFIG_CLK_QCOM_QCS404=y
> @@ -65,3 +64,26 @@ CONFIG_VIDEO_SIMPLE=y
>  CONFIG_HEXDUMP=y
>  # CONFIG_GENERATE_SMBIOS_TABLE is not set
>  CONFIG_LMB_MAX_REGIONS=64
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_EEPROM=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_PING=y
> +CONFIG_DM_ETH=y
> +CONFIG_DM_ETH_PHY=y
> +CONFIG_DM_MDIO=y
> +CONFIG_DWC_ETH_QOS=y
> +CONFIG_DWC_ETH_QOS_QCOM=y
> +CONFIG_RGMII=y
> +CONFIG_PHY_MICREL=y
> +CONFIG_PHY_MICREL_KSZ90X1=y
> +CONFIG_MISC=y
> +CONFIG_NVMEM=y
> +CONFIG_DM_I2C=y
> +CONFIG_I2C_SUPPORT=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_EEPROM=y
> +CONFIG_SYS_I2C=y
> +CONFIG_SYS_I2C_QUP=y
> +CONFIG_SYS_I2C_EEPROM_BUS=2
> +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
> --
> 2.34.1
>
Caleb Connolly March 5, 2024, 5:38 p.m. UTC | #2
On Mon, 19 Feb 2024 14:11:44 +0530, Sumit Garg wrote:
> QCS404 supports Synopsys Designware Ethernet QOS IP and we already have
> the corresponding glue layer present upstream as:
> drivers/net/dwc_eth_qos_qcom.c. So enable corresponding support.
> 
> Along with that it is possible for Qualcomm platforms to retrieve MAC
> address from I2C eeprom present on board. So enable corresponding
> support as well.
> 
> [...]

Applied, thanks!

[1/1] qcom_defconfig: Enable ethernet and I2C support
      commit: b307c5d45dcd1e086a3b28affd1a1006f35334b4

Best regards,
diff mbox series

Patch

diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 222db6448aba..cbc612b44bd9 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -26,7 +26,6 @@  CONFIG_CMD_USB=y
 CONFIG_CMD_CAT=y
 CONFIG_CMD_BMP=y
 CONFIG_CMD_LOG=y
-# CONFIG_NET is not set
 CONFIG_BUTTON_QCOM_PMIC=y
 CONFIG_CLK=y
 CONFIG_CLK_QCOM_QCS404=y
@@ -65,3 +64,26 @@  CONFIG_VIDEO_SIMPLE=y
 CONFIG_HEXDUMP=y
 # CONFIG_GENERATE_SMBIOS_TABLE is not set
 CONFIG_LMB_MAX_REGIONS=64
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PING=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DM_MDIO=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_QCOM=y
+CONFIG_RGMII=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_MISC=y
+CONFIG_NVMEM=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SUPPORT=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C=y
+CONFIG_SYS_I2C_QUP=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5