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tcg/aarch64: Apple does not align __int128_t in even registers

Message ID 20240216214547.10350-1-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg/aarch64: Apple does not align __int128_t in even registers | expand

Commit Message

Richard Henderson Feb. 16, 2024, 9:45 p.m. UTC
Cc: qemu-stable@nongnu.org
Fixes: 5427a9a7604 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2169
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---

See the gitlab issue for complete discussion of the ABI.

r~

---
 tcg/aarch64/tcg-target.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Philippe Mathieu-Daudé Feb. 18, 2024, 10:59 a.m. UTC | #1
On 16/2/24 22:45, Richard Henderson wrote:

Please include your comment
https://gitlab.com/qemu-project/qemu/-/issues/2169#note_1777369822

---
Apple differs from the standard ABI in the alignment of __int128_t.

 From Apple's documentation:

   When passing an argument with 16-byte alignment in integer registers,
   Apple platforms allow the argument to start in an odd-numbered xN
   register. The standard ABI requires it to begin in an even-numbered
   xN register.

This is confirmed with a simple test:

   void g(int w, __int128_t x, int y);
   void h(void)
   {
       g(-1, 0, 1);
   }

which produces

	mov	w0, #-1
	mov	x1, #0
	mov	x2, #0
	mov	w3, #1
	bl	_g


using Apple clang version 14.0.0 (clang-1400.0.29.202).  Note
that the x argument (the zeros) is loaded into x1 and x2 and
the y argument is loaded into w3.

On Linux, using the standard ARM ABI, this compiles to

         mov     w4, 1
         mov     x2, 0
         mov     x3, 0
         mov     w0, -1
         bl      g


Note that the x argument is loaded into x2 and x3, and the y
argument is loaded into w4.
The TCG JIT must be taught about this difference for MacOS.
---

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> Cc: qemu-stable@nongnu.org
> Fixes: 5427a9a7604 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2169
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> 
> See the gitlab issue for complete discussion of the ABI.
> 
> r~
> 
> ---
>   tcg/aarch64/tcg-target.h | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
> index ef5ebe91bd..85d5746e47 100644
> --- a/tcg/aarch64/tcg-target.h
> +++ b/tcg/aarch64/tcg-target.h
> @@ -55,7 +55,11 @@ typedef enum {
>   #define TCG_TARGET_CALL_STACK_OFFSET    0
>   #define TCG_TARGET_CALL_ARG_I32         TCG_CALL_ARG_NORMAL
>   #define TCG_TARGET_CALL_ARG_I64         TCG_CALL_ARG_NORMAL
> -#define TCG_TARGET_CALL_ARG_I128        TCG_CALL_ARG_EVEN
> +#ifdef CONFIG_DARWIN
> +# define TCG_TARGET_CALL_ARG_I128       TCG_CALL_ARG_NORMAL
> +#else
> +# define TCG_TARGET_CALL_ARG_I128       TCG_CALL_ARG_EVEN
> +#endif
>   #define TCG_TARGET_CALL_RET_I128        TCG_CALL_RET_NORMAL
>   
>   #define have_lse    (cpuinfo & CPUINFO_LSE)
diff mbox series

Patch

diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index ef5ebe91bd..85d5746e47 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -55,7 +55,11 @@  typedef enum {
 #define TCG_TARGET_CALL_STACK_OFFSET    0
 #define TCG_TARGET_CALL_ARG_I32         TCG_CALL_ARG_NORMAL
 #define TCG_TARGET_CALL_ARG_I64         TCG_CALL_ARG_NORMAL
-#define TCG_TARGET_CALL_ARG_I128        TCG_CALL_ARG_EVEN
+#ifdef CONFIG_DARWIN
+# define TCG_TARGET_CALL_ARG_I128       TCG_CALL_ARG_NORMAL
+#else
+# define TCG_TARGET_CALL_ARG_I128       TCG_CALL_ARG_EVEN
+#endif
 #define TCG_TARGET_CALL_RET_I128        TCG_CALL_RET_NORMAL
 
 #define have_lse    (cpuinfo & CPUINFO_LSE)