diff mbox series

[v1] arm64: dts: ti: verdin-am62: mallow: add TPM device

Message ID 20240126165136.28543-1-francesco@dolcini.it
State New
Headers show
Series [v1] arm64: dts: ti: verdin-am62: mallow: add TPM device | expand

Commit Message

Francesco Dolcini Jan. 26, 2024, 4:51 p.m. UTC 
From: Francesco Dolcini <francesco.dolcini@toradex.com>

Add TPM device to Mallow device tree file, the device is connected to
the SoC with SPI1/CS1, the same SPI interface is also available on an
extension header together with an additional CS0 signal.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
 arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi
index 17b93534f658..77b1beb638ad 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin-mallow.dtsi
@@ -127,6 +127,16 @@  &main_spi1 {
 		    <&pinctrl_qspi1_cs2_gpio>;
 	cs-gpios = <0>, <&main_gpio0 12 GPIO_ACTIVE_LOW>;
 	status = "okay";
+
+	tpm@1 {
+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+		reg = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qspi1_dqs_gpio>;
+		interrupt-parent = <&main_gpio1>;
+		interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+		spi-max-frequency = <18500000>;
+	};
 };
 
 /* Verdin UART_3 */