Message ID | 20240119111132.1290455-5-tudor.ambarus@linaro.org |
---|---|
State | Accepted |
Commit | af5c317a93ef168c105bd28afdd675e962244591 |
Headers | show |
Series | GS101 Oriole: CMU_PERIC0 support and USI updates | expand |
On Fri, 19 Jan 2024 11:11:28 +0000, Tudor Ambarus wrote: > Remove the reg-io-width property in order to comply with the bindings. > > The entire bus (PERIC) on which the GS101 serial resides only allows > 32-bit register accesses. The reg-io-width dt property is disallowed > for the "google,gs101-uart" compatible and instead the iotype is > inferred from the compatible. > > [...] Applied, thanks! [4/8] arm64: dts: exynos: gs101: remove reg-io-width from serial https://git.kernel.org/krzk/linux/c/daff9d192892ea583284eb116a07e8e0086f0e76 Best regards,
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index d838e3a7af6e..4e5f4c748906 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -366,7 +366,6 @@ usi_uart: usi@10a000c0 { serial_0: serial@10a00000 { compatible = "google,gs101-uart"; reg = <0x10a00000 0xc0>; - reg-io-width = <4>; interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&dummy_clk 0>, <&dummy_clk 0>;