| Message ID | 20240119113507.31951-1-philmd@linaro.org |
|---|---|
| State | New |
| Headers | show |
On Fri, 19 Jan 2024 at 11:37, Philippe Mathieu-Daudé <philmd@linaro.org> wrote: > > The following changes since commit 88cf5fec91e50cd34bc002b633b4116228db0bc8: > > Merge tag 'pull-target-arm-20240118' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-01-18 12:48:17 +0000) > > are available in the Git repository at: > > https://github.com/philmd/qemu.git tags/hw-cpus-20240119 > > for you to fetch changes up to 7ec5d7d91215815e885d2b38e62256e8fd8e2bce: > > configure: Add linux header compile support for LoongArch (2024-01-19 12:28:59 +0100) > > ---------------------------------------------------------------- > HW core patch queue > > . Deprecate unmaintained SH-4 models (Samuel) > . HPET: Convert DPRINTF calls to trace events (Daniel) > . Implement buffered block writes in Intel PFlash (Gerd) > . Ignore ELF loadable segments with zero size (Bin) > . ESP/NCR53C9x: PCI DMA fixes (Mark) > . PIIX: Simplify Xen PCI IRQ routing (Bernhard) > . Restrict CPU 'start-powered-off' property to sysemu (Phil) > > . target/alpha: Only build sys_helper.c on system emulation (Phil) > . target/xtensa: Use generic instruction breakpoint API & add test (Max) > . Restrict icount to system emulation (Phil) > . Do not set CPUState TCG-specific flags in non-TCG accels (Phil) > . Cleanup TCG tb_invalidate API (Phil) > . Correct LoongArch/KVM include path (Bibo) > . Do not ignore throttle errors in crypto backends (Phil) > > . MAINTAINERS updates (Raphael, Zhao) > > Note the following checkpatch error is deliberately ignored: > > ERROR: space prohibited after that '&&' (ctx:ExW) > #143: FILE: accel/tcg/watchpoint.c:119: > + && cc->tcg_ops->debug_check_watchpoint > ^ > ---------------------------------------------------------------- > Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0 for any user-visible changes. -- PMM
The following changes since commit 88cf5fec91e50cd34bc002b633b4116228db0bc8: Merge tag 'pull-target-arm-20240118' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-01-18 12:48:17 +0000) are available in the Git repository at: https://github.com/philmd/qemu.git tags/hw-cpus-20240119 for you to fetch changes up to 7ec5d7d91215815e885d2b38e62256e8fd8e2bce: configure: Add linux header compile support for LoongArch (2024-01-19 12:28:59 +0100) ---------------------------------------------------------------- HW core patch queue . Deprecate unmaintained SH-4 models (Samuel) . HPET: Convert DPRINTF calls to trace events (Daniel) . Implement buffered block writes in Intel PFlash (Gerd) . Ignore ELF loadable segments with zero size (Bin) . ESP/NCR53C9x: PCI DMA fixes (Mark) . PIIX: Simplify Xen PCI IRQ routing (Bernhard) . Restrict CPU 'start-powered-off' property to sysemu (Phil) . target/alpha: Only build sys_helper.c on system emulation (Phil) . target/xtensa: Use generic instruction breakpoint API & add test (Max) . Restrict icount to system emulation (Phil) . Do not set CPUState TCG-specific flags in non-TCG accels (Phil) . Cleanup TCG tb_invalidate API (Phil) . Correct LoongArch/KVM include path (Bibo) . Do not ignore throttle errors in crypto backends (Phil) . MAINTAINERS updates (Raphael, Zhao) Note the following checkpatch error is deliberately ignored: ERROR: space prohibited after that '&&' (ctx:ExW) #143: FILE: accel/tcg/watchpoint.c:119: + && cc->tcg_ops->debug_check_watchpoint ^ ---------------------------------------------------------------- Bernhard Beschow (1): hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent Bibo Mao (1): configure: Add linux header compile support for LoongArch Bin Meng (1): hw/elf_ops: Ignore loadable segments with zero size Daniel Hoffman (1): hw/timer/hpet: Convert DPRINTF to trace events Gerd Hoffmann (3): hw/pflash: refactor pflash_data_write() hw/pflash: use ldn_{be,le}_p and stn_{be,le}_p hw/pflash: implement update buffer for block writes Mark Cave-Ayland (4): hw/scsi/esp-pci: use correct address register for PCI DMA transfers hw/scsi/esp-pci: generate PCI interrupt from separate ESP and PCI sources hw/scsi/esp-pci: synchronise setting of DMA_STAT_DONE with ESP completion interrupt hw/scsi/esp-pci: set DMA_STAT_BCMBLT when BLAST command issued Max Filippov (2): target/xtensa: use generic instruction breakpoint infrastructure tests/tcg/xtensa: add icount/ibreak priority test Philippe Mathieu-Daudé (19): backends/cryptodev: Do not ignore throttle/backends Errors accel: Do not set CPUState::tcg_cflags in non-TCG accels accel: Do not set CPUState::can_do_io in non-TCG accels accel/tcg: Remove unused tb_invalidate_phys_addr() accel/tcg: Remove tb_invalidate_phys_page() from system emulation target/alpha: Extract clk_helper.c from sys_helper.c target/alpha: Only build sys_helper.c on system emulation system/cpu-timers: Have icount_configure() return a boolean system/cpu-timers: Introduce ICountMode enumerator target/arm: Ensure icount is enabled when emulating INST_RETIRED util/async: Only call icount_notify_exit() if icount is enabled system/replay: Restrict icount to system emulation system/watchpoint: Move TCG specific code to accel/tcg/ cpus: Restrict 'start-powered-off' property to system emulation accel: Rename accel_init_ops_interfaces() to include 'system' hw/core/cpu: Rename cpu_class_init() to include 'common' hw/s390x: Rename cpu_class_init() to include 'sclp' target/i386: Rename tcg_cpu_FOO() to include 'x86' target/riscv: Rename tcg_cpu_FOO() to include 'riscv' Raphael Norwitz (1): MAINTAINERS: Update Raphael Norwitz email Samuel Tardieu (2): target/sh4: Deprecate the shix machine hw/block: Deprecate the TC58128 block device Zhao Liu (1): MAINTAINERS: Update hw/core/cpu.c entry MAINTAINERS | 5 +- docs/about/deprecated.rst | 5 + configure | 1 + accel/accel-system.h | 2 +- include/exec/exec-all.h | 5 - include/exec/translate-all.h | 1 - include/hw/elf_ops.h | 71 +++++++------- include/sysemu/cpu-timers.h | 32 +++++-- include/sysemu/replay.h | 11 ++- target/xtensa/cpu.h | 4 + accel/accel-system.c | 2 +- accel/accel-target.c | 2 +- accel/dummy-cpus.c | 1 - accel/hvf/hvf-accel-ops.c | 1 - accel/kvm/kvm-accel-ops.c | 1 - accel/tcg/icount-common.c | 36 +++---- accel/tcg/tb-maint.c | 24 +---- accel/tcg/watchpoint.c | 143 ++++++++++++++++++++++++++++ backends/cryptodev.c | 10 ++ cpu-target.c | 36 ++----- hw/block/pflash_cfi01.c | 171 ++++++++++++++++++---------------- hw/block/pflash_cfi02.c | 2 +- hw/block/tc58128.c | 1 + hw/core/cpu-common.c | 4 +- hw/i386/pc_piix.c | 9 +- hw/s390x/sclpcpu.c | 4 +- hw/scsi/esp-pci.c | 61 ++++++++---- hw/sh4/shix.c | 1 + hw/timer/hpet.c | 55 +++++------ stubs/icount.c | 27 +----- system/cpu-timers.c | 2 +- system/vl.c | 3 +- system/watchpoint.c | 124 ------------------------ target/alpha/clk_helper.c | 32 +++++++ target/alpha/sys_helper.c | 18 ---- target/arm/cpu.c | 2 +- target/arm/helper.c | 5 +- target/i386/cpu.c | 2 +- target/i386/tcg/tcg-cpu.c | 32 +++---- target/riscv/tcg/tcg-cpu.c | 28 +++--- target/xtensa/cpu.c | 1 + target/xtensa/dbg_helper.c | 46 +++++---- target/xtensa/helper.c | 12 +++ target/xtensa/translate.c | 17 ---- util/async.c | 16 ++-- accel/tcg/meson.build | 1 + hw/block/trace-events | 7 +- hw/timer/trace-events | 15 +++ target/alpha/meson.build | 7 +- tests/tcg/xtensa/test_break.S | 25 ++++- 50 files changed, 603 insertions(+), 520 deletions(-) create mode 100644 accel/tcg/watchpoint.c create mode 100644 target/alpha/clk_helper.c