@@ -20,6 +20,8 @@ properties:
enum:
- mediatek,mt7988-lvts-ap
- mediatek,mt8186-lvts
+ - mediatek,mt8188-lvts-ap
+ - mediatek,mt8188-lvts-mcu
- mediatek,mt8192-lvts-ap
- mediatek,mt8192-lvts-mcu
- mediatek,mt8195-lvts-ap
@@ -61,6 +63,8 @@ allOf:
compatible:
contains:
enum:
+ - mediatek,mt8188-lvts-ap
+ - mediatek,mt8188-lvts-mcu
- mediatek,mt8192-lvts-ap
- mediatek,mt8192-lvts-mcu
then:
@@ -1441,6 +1441,89 @@ static const struct lvts_ctrl_data mt8186_lvts_data_ctrl[] = {
}
};
+static const struct lvts_ctrl_data mt8188_lvts_mcu_data_ctrl[] = {
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_MCU_TS1_0,
+ .cal_offsets = { 22, 23, 24 } },
+ { .dt_id = MT8188_MCU_TS1_1,
+ .cal_offsets = { 25, 26, 27 } },
+ { .dt_id = MT8188_MCU_TS1_2,
+ .cal_offsets = { 28, 29, 30 } },
+ { .dt_id = MT8188_MCU_TS1_3,
+ .cal_offsets = { 31, 32, 33 } },
+ },
+ .num_lvts_sensor = 4,
+ .offset = 0x0,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ },
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_MCU_TS2_0,
+ .cal_offsets = { 34, 35, 36 } },
+ { .dt_id = MT8188_MCU_TS2_1,
+ .cal_offsets = { 37, 38, 39 } },
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x100,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ }
+};
+
+static const struct lvts_ctrl_data mt8188_lvts_ap_data_ctrl[] = {
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_AP_TS3_1,
+ .cal_offsets = { 40, 41, 42 } },
+ },
+ .num_lvts_sensor = 1,
+ .skipped_sensors = 1,
+ .offset = 0x0,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ },
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_AP_TS4_0,
+ .cal_offsets = { 43, 44, 45 } },
+ { .dt_id = MT8188_AP_TS4_1,
+ .cal_offsets = { 46, 47, 48 } },
+ { .dt_id = MT8188_AP_TS4_2,
+ .cal_offsets = { 49, 50, 51 } },
+ },
+ .num_lvts_sensor = 3,
+ .offset = 0x100,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ },
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_AP_TS5_0,
+ .cal_offsets = { 52, 53, 54 } },
+ { .dt_id = MT8188_AP_TS5_1,
+ .cal_offsets = { 55, 56, 57 } },
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x200,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ },
+ {
+ .lvts_sensor = {
+ { .dt_id = MT8188_AP_TS6_0,
+ .cal_offsets = { 58, 59, 60 } },
+ { .dt_id = MT8188_AP_TS6_1,
+ .cal_offsets = { 61, 62, 63 } },
+ },
+ .num_lvts_sensor = 2,
+ .offset = 0x300,
+ .hw_tshut_temp = 117000,
+ .mode = LVTS_MSR_FILTERED_MODE,
+ }
+};
+
static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
{
.lvts_sensor = {
@@ -1638,6 +1721,22 @@ static const struct lvts_data mt8186_lvts_data = {
.gt_calib_bit_offset = 24,
};
+static const struct lvts_data mt8188_lvts_mcu_data = {
+ .lvts_ctrl = mt8188_lvts_mcu_data_ctrl,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
+ .temp_factor = -250460,
+ .temp_offset = 250460,
+ .gt_calib_bit_offset = 20,
+};
+
+static const struct lvts_data mt8188_lvts_ap_data = {
+ .lvts_ctrl = mt8188_lvts_ap_data_ctrl,
+ .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
+ .temp_factor = -250460,
+ .temp_offset = 250460,
+ .gt_calib_bit_offset = 20,
+};
+
static const struct lvts_data mt8192_lvts_mcu_data = {
.lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
.num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
@@ -1669,6 +1768,8 @@ static const struct lvts_data mt8195_lvts_ap_data = {
static const struct of_device_id lvts_of_match[] = {
{ .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },
{ .compatible = "mediatek,mt8186-lvts", .data = &mt8186_lvts_data },
+ { .compatible = "mediatek,mt8188-lvts-mcu", .data = &mt8188_lvts_mcu_data },
+ { .compatible = "mediatek,mt8188-lvts-ap", .data = &mt8188_lvts_ap_data },
{ .compatible = "mediatek,mt8192-lvts-mcu", .data = &mt8192_lvts_mcu_data },
{ .compatible = "mediatek,mt8192-lvts-ap", .data = &mt8192_lvts_ap_data },
{ .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
@@ -26,6 +26,22 @@
#define MT8186_TS3_1 7
#define MT8186_TS3_2 8
+#define MT8188_MCU_TS1_0 0
+#define MT8188_MCU_TS1_1 1
+#define MT8188_MCU_TS1_2 2
+#define MT8188_MCU_TS1_3 3
+#define MT8188_MCU_TS2_0 4
+#define MT8188_MCU_TS2_1 5
+
+#define MT8188_AP_TS3_1 0
+#define MT8188_AP_TS4_0 1
+#define MT8188_AP_TS4_1 2
+#define MT8188_AP_TS4_2 3
+#define MT8188_AP_TS5_0 4
+#define MT8188_AP_TS5_1 5
+#define MT8188_AP_TS6_0 6
+#define MT8188_AP_TS6_1 7
+
#define MT8195_MCU_BIG_CPU0 0
#define MT8195_MCU_BIG_CPU1 1
#define MT8195_MCU_BIG_CPU2 2