@@ -8,8 +8,15 @@
*/
/* This file contains implementation code for the RealView EB interrupt
- controller, MPCore distributed interrupt controller and ARMv7-M
- Nested Vectored Interrupt Controller. */
+ * controller, MPCore distributed interrupt controller and ARMv7-M
+ * Nested Vectored Interrupt Controller.
+ * It is compiled in two ways:
+ * (1) as a standalone file to produce a sysbus device which is a GIC
+ * that can be used on the realview board and as one of the builtin
+ * private peripherals for the ARM MP CPUs (11MPCore, A9, etc)
+ * (2) by being directly #included into armv7m_nvic.c to produce the
+ * armv7m_nvic device.
+ */
#include "sysbus.h"
@@ -909,7 +916,7 @@ static void gic_init(gic_state *s, int num_irq)
register_savevm(NULL, "arm_gic", -1, 2, gic_save, gic_load, s);
}
-#ifndef LEGACY_INCLUDED_GIC
+#ifndef NVIC
static int arm_gic_init(SysBusDevice *dev)
{
@@ -16,7 +16,6 @@
#include "exec-memory.h"
#define NVIC 1
-#define LEGACY_INCLUDED_GIC
static uint32_t nvic_readl(void *opaque, uint32_t offset);
static void nvic_writel(void *opaque, uint32_t offset, uint32_t value);
Now all the A profile cores have been switched to use the standalone sysbus GIC, the only remaining code which #includes arm_gic.c is the v7M NVIC. The coupling is much closer here so it's not so easily disentangled. For now, add a comment about how arm_gic.c is compiled, and assume that the NVIC always includes arm_gic.c and the non-NVIC GIC is always compiled standalone. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm_gic.c | 13 ++++++++++--- hw/armv7m_nvic.c | 1 - 2 files changed, 10 insertions(+), 4 deletions(-)