diff mbox series

[1/2] dt-bindings: fpga: Convert bridge binding to yaml

Message ID 3100bbc4723643ec1ec7d4548e9ab353c856b564.1704470663.git.michal.simek@amd.com
State Superseded
Headers show
Series [1/2] dt-bindings: fpga: Convert bridge binding to yaml | expand

Commit Message

Michal Simek Jan. 5, 2024, 4:04 p.m. UTC
Convert the generic fpga bridge DT binding to json-schema.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 .../devicetree/bindings/fpga/fpga-bridge.txt  | 13 --------
 .../devicetree/bindings/fpga/fpga-bridge.yaml | 30 +++++++++++++++++++
 .../bindings/fpga/xlnx,pr-decoupler.yaml      |  5 +++-
 3 files changed, 34 insertions(+), 14 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.txt
 create mode 100644 Documentation/devicetree/bindings/fpga/fpga-bridge.yaml

Comments

Krzysztof Kozlowski Jan. 8, 2024, 9:09 a.m. UTC | #1
On 05/01/2024 17:04, Michal Simek wrote:
> Convert the generic fpga bridge DT binding to json-schema.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>

> +$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: FPGA Bridge
> +
> +maintainers:
> +  - Michal Simek <michal.simek@amd.com>
> +
> +properties:
> +  $nodename:
> +    pattern: "^fpga-bridge(@.*)?$"

Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
than one bridge on given system?

Anyway, looks fine:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Krzysztof Kozlowski Jan. 9, 2024, 8 a.m. UTC | #2
On 09/01/2024 04:53, Xu Yilun wrote:
> On Mon, Jan 08, 2024 at 10:16:17AM +0100, Michal Simek wrote:
>>
>>
>> On 1/8/24 10:09, Krzysztof Kozlowski wrote:
>>> On 05/01/2024 17:04, Michal Simek wrote:
>>>> Convert the generic fpga bridge DT binding to json-schema.
>>>>
>>>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>>>
>>>> +$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: FPGA Bridge
>>>> +
>>>> +maintainers:
>>>> +  - Michal Simek <michal.simek@amd.com>
>>>> +
>>>> +properties:
>>>> +  $nodename:
>>>> +    pattern: "^fpga-bridge(@.*)?$"
>>>
>>> Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
>>> than one bridge on given system?
>>
>> Yilun: Any comment on this?
> 
> We can have more bridges, but IIUC people use fpga-bridge@0, fpga-bridge@0
> to identify them. So the expression is OK to me.

So you claim unit address thus reg with some sort of bus address is a
requirement? Then "?" is not correct in that pattern.

Best regards,
Krzysztof
Krzysztof Kozlowski Jan. 9, 2024, 8:16 a.m. UTC | #3
On 09/01/2024 09:15, Krzysztof Kozlowski wrote:
>>>>>>> +properties:
>>>>>>> +  $nodename:
>>>>>>> +    pattern: "^fpga-bridge(@.*)?$"
>>>>>>
>>>>>> Not sure, but maybe we need to allow fpga-bridge-1? Could we have more
>>>>>> than one bridge on given system?
>>>>>
>>>>> Yilun: Any comment on this?
>>>>
>>>> We can have more bridges, but IIUC people use fpga-bridge@0, fpga-bridge@0
>>>> to identify them. So the expression is OK to me.
>>>
>>> So you claim unit address thus reg with some sort of bus address is a
>>> requirement? Then "?" is not correct in that pattern.
>>
>> I expect it is about that people are using fpga-bridge@0 but bridge is not on 
>> the bus. Yilun said that reg property in altr,socfpga-fpga2sdram-bridge.yaml is 
>> optional which means no reg property no @XXX in node name.
>> That's why I think that expression is correct. If there are more bridges without 
>> reg property then I expect we need to get more examples to align expression.
> 
> If we allow node name without unit address, thus not being part of any
> bus, then the only question is whether it is possible to have system
> with more than two FPGA bridges. If the answer is "yes", which I think
> is the case, then the pattern should already allow it:
> 
> (@[0-9a-f]+|-[0-9]+)?

Or better go with what I used recently for narrowed choices:

(@.*|-([0-9]|[1-9][0-9]+))?

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/fpga/fpga-bridge.txt b/Documentation/devicetree/bindings/fpga/fpga-bridge.txt
deleted file mode 100644
index 72e06917288a..000000000000
--- a/Documentation/devicetree/bindings/fpga/fpga-bridge.txt
+++ /dev/null
@@ -1,13 +0,0 @@ 
-FPGA Bridge Device Tree Binding
-
-Optional properties:
-- bridge-enable		: 0 if driver should disable bridge at startup
-			  1 if driver should enable bridge at startup
-			  Default is to leave bridge in current state.
-
-Example:
-	fpga_bridge3: fpga-bridge@ffc25080 {
-		compatible = "altr,socfpga-fpga2sdram-bridge";
-		reg = <0xffc25080 0x4>;
-		bridge-enable = <0>;
-	};
diff --git a/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml b/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
new file mode 100644
index 000000000000..248639c6b560
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/fpga-bridge.yaml
@@ -0,0 +1,30 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/fpga-bridge.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FPGA Bridge
+
+maintainers:
+  - Michal Simek <michal.simek@amd.com>
+
+properties:
+  $nodename:
+    pattern: "^fpga-bridge(@.*)?$"
+
+  bridge-enable:
+    description: |
+      0 if driver should disable bridge at startup
+      1 if driver should enable bridge at startup
+      Default is to leave bridge in current state.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 0, 1 ]
+
+additionalProperties: true
+
+examples:
+  - |
+    fpga-bridge {
+        bridge-enable = <0>;
+    };
diff --git a/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml b/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
index a7d4b8e59e19..5bf731f9d99a 100644
--- a/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
+++ b/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml
@@ -9,6 +9,9 @@  title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
 maintainers:
   - Nava kishore Manne <nava.kishore.manne@amd.com>
 
+allOf:
+  - $ref: fpga-bridge.yaml#
+
 description: |
   The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
   decouplers/fpga bridges. The controller can decouple/disable the bridges
@@ -51,7 +54,7 @@  required:
   - clocks
   - clock-names
 
-additionalProperties: false
+unevaluatedProperties: false
 
 examples:
   - |