Message ID | 20231215204050.2296404-7-cristian.ciocaltea@collabora.com |
---|---|
State | New |
Headers | show |
Series | Enable networking support for StarFive JH7100 SoC | expand |
On 12/17/23 19:55, Andrew Lunn wrote: > On Fri, Dec 15, 2023 at 10:40:45PM +0200, Cristian Ciocaltea wrote: >> The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting >> RGMII-ID, but requires manual adjustment of the RX internal delay to >> work properly. >> >> The default RX delay provided by the driver is 1.95 ns, which proves to >> be too high. Applying a 50% reduction seems to mitigate the issue. >> >> Also note this adjustment is not necessary on BeagleV Starlight SBC, >> which uses a Microchip PHY. Hence, there is no indication of a >> miss-behaviour on the GMAC side, but most likely the issue stems from >> the Motorcomm PHY. > > I suggest you make a similar comment in the .dts file, just to explain > the odd setting. Sure, will do, we need a v4 anyway. Thanks, Cristian
diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts index e82af72f1aaf..ca134b9f11bf 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts +++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts @@ -18,3 +18,10 @@ gpio-restart { priority = <224>; }; }; + +&mdio { + phy: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <900>; + }; +};