@@ -243,7 +243,7 @@ static void set_buffers(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *src_buf)
vdpu_write_relaxed(vpu, dst_dma + offset, G1_REG_ADDR_DIR_MV);
}
- /* Auxiliary buffer prepared in hantro_g1_h264_dec_prepare_table(). */
+ /* Auxiliary buffer prepared in hantro_h264_dec_init(). */
vdpu_write_relaxed(vpu, ctx->h264_dec.priv.dma, G1_REG_ADDR_QTABLE);
}
@@ -460,7 +460,7 @@ static void set_buffers(struct hantro_ctx *ctx, struct vb2_v4l2_buffer *src_buf)
vdpu_write_relaxed(vpu, dst_dma + offset, VDPU_REG_DIR_MV_BASE);
}
- /* Auxiliary buffer prepared in hantro_g1_h264_dec_prepare_table(). */
+ /* Auxiliary buffer prepared in hantro_h264_dec_init(). */
vdpu_write_relaxed(vpu, ctx->h264_dec.priv.dma, VDPU_REG_QTABLE_BASE);
}
@@ -118,7 +118,7 @@
#define av1_mcomp_filt_type AV1_DEC_REG(11, 8, 0x7)
#define av1_multicore_expect_context_update AV1_DEC_REG(11, 11, 0x1)
#define av1_multicore_sbx_offset AV1_DEC_REG(11, 12, 0x7f)
-#define av1_ulticore_tile_col AV1_DEC_REG(11, 19, 0x7f)
+#define av1_multicore_tile_col AV1_DEC_REG(11, 19, 0x7f)
#define av1_transform_mode AV1_DEC_REG(11, 27, 0x7)
#define av1_dec_tile_size_mag AV1_DEC_REG(11, 30, 0x3)
Function hantro_g1_h264_dec_prepare_table() does not exist, should be replaced with hantro_h264_dec_init(). The register name av1_ulticore_tile_col confused sometimes, although not be used corrently. The correct name should be av1_multicore_tile_col. Signed-off-by: renjun wang <renjunw0@foxmail.com> --- drivers/media/platform/verisilicon/hantro_g1_h264_dec.c | 2 +- drivers/media/platform/verisilicon/rockchip_vpu2_hw_h264_dec.c | 2 +- drivers/media/platform/verisilicon/rockchip_vpu981_regs.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)