| Message ID | 20231129100422.16659-3-quic_tengfan@quicinc.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | pinctrl: qcom: fix some sm4450 pinctrl issue | expand |
在 11/29/2023 9:32 PM, Konrad Dybcio 写道: > On 29.11.2023 11:04, Tengfei Fan wrote: >> The address offset of 0x100000 is already provided in SM4450 DTSI, so >> subtract 0x100000 from the offset which used by ufs and sdc. >> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- > The change seems correct. > > Looks like the pinctrl has not been merged, so these patches should > be merged into the "Add SM4450 pinctrl driver" series and resent > as another revision > > Konrad > >
在 11/29/2023 9:32 PM, Konrad Dybcio 写道: > On 29.11.2023 11:04, Tengfei Fan wrote: >> The address offset of 0x100000 is already provided in SM4450 DTSI, so >> subtract 0x100000 from the offset which used by ufs and sdc. >> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- > The change seems correct. > > Looks like the pinctrl has not been merged, so these patches should > be merged into the "Add SM4450 pinctrl driver" series and resent > as another revision > > Konrad > > Sure, I will merge these pacthes into the "Add SM4450 pinctrl driver" series and resent new version patch series.
diff --git a/drivers/pinctrl/qcom/pinctrl-sm4450.c b/drivers/pinctrl/qcom/pinctrl-sm4450.c index 49e2e3a7a9cb..5496f955ed2a 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm4450.c +++ b/drivers/pinctrl/qcom/pinctrl-sm4450.c @@ -936,14 +936,14 @@ static const struct msm_pingroup sm4450_groups[] = { [133] = PINGROUP(133, _, phase_flag, _, _, _, _, _, _, _), [134] = PINGROUP(134, tsense_pwm1_out, tsense_pwm2_out, _, _, _, _, _, _, _), [135] = PINGROUP(135, _, phase_flag, _, _, _, _, _, _, _), - [136] = UFS_RESET(ufs_reset, 0x197000), - [137] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x18c004, 0, 0), - [138] = SDC_QDSD_PINGROUP(sdc1_clk, 0x18c000, 13, 6), - [139] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x18c000, 11, 3), - [140] = SDC_QDSD_PINGROUP(sdc1_data, 0x18c000, 9, 0), - [141] = SDC_QDSD_PINGROUP(sdc2_clk, 0x18f000, 14, 6), - [142] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x18f000, 11, 3), - [143] = SDC_QDSD_PINGROUP(sdc2_data, 0x18f000, 9, 0), + [136] = UFS_RESET(ufs_reset, 0x97000), + [137] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x8c004, 0, 0), + [138] = SDC_QDSD_PINGROUP(sdc1_clk, 0x8c000, 13, 6), + [139] = SDC_QDSD_PINGROUP(sdc1_cmd, 0x8c000, 11, 3), + [140] = SDC_QDSD_PINGROUP(sdc1_data, 0x8c000, 9, 0), + [141] = SDC_QDSD_PINGROUP(sdc2_clk, 0x8f000, 14, 6), + [142] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x8f000, 11, 3), + [143] = SDC_QDSD_PINGROUP(sdc2_data, 0x8f000, 9, 0), }; static const struct msm_gpio_wakeirq_map sm4450_pdc_map[] = {
The address offset of 0x100000 is already provided in SM4450 DTSI, so subtract 0x100000 from the offset which used by ufs and sdc. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- drivers/pinctrl/qcom/pinctrl-sm4450.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)