@@ -261,6 +261,7 @@ static const TypeInfo kvm_arm_its_info = {
.instance_size = sizeof(GICv3ITSState),
.class_init = kvm_arm_its_class_init,
.class_size = sizeof(KVMARMITSClass),
+ .can_register = target_aarch64_available,
};
static void kvm_arm_its_register_types(void)
@@ -909,6 +909,7 @@ static const TypeInfo kvm_arm_gicv3_info = {
.instance_size = sizeof(GICv3State),
.class_init = kvm_arm_gicv3_class_init,
.class_size = sizeof(KVMARMGICv3Class),
+ .can_register = target_aarch64_available,
};
static void kvm_arm_gicv3_register_types(void)
@@ -40,8 +40,10 @@ endif
specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common.c'))
specific_ss.add(when: 'CONFIG_ARM_GIC', if_true: files('arm_gicv3_cpuif_common.c'))
specific_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files('arm_gicv3_cpuif.c'))
-specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c'))
-specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c'))
+specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files(
+ 'arm_gic_kvm.c',
+ 'arm_gicv3_kvm.c',
+ 'arm_gicv3_its_kvm.c'))
specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c'))
specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c'))
specific_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic.c'))
Use the target_aarch64_available() to build the ARM_GIC_KVM types regardless the ARM/AARCH64 targets are selected, but restrict its registration to TARGET_AARCH64 presence at runtime. This will help to have a single binary running both ARM/Aarch64. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/intc/arm_gicv3_its_kvm.c | 1 + hw/intc/arm_gicv3_kvm.c | 1 + hw/intc/meson.build | 6 ++++-- 3 files changed, 6 insertions(+), 2 deletions(-)