Message ID | 1700533494-19276-8-git-send-email-quic_taozha@quicinc.com |
---|---|
State | Superseded |
Headers | show |
Series | [v3,1/8] dt-bindings: arm: Add support for CMB element size | expand |
Tao Zhang, On 21/11/2023 07:24, Krzysztof Kozlowski wrote: > On 21/11/2023 03:24, Tao Zhang wrote: >> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) >> for TPDM. It specifies the number of CMB MSR registers supported by >> the TDPM. >> >> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >> --- > > I prefer not to take any new Qualcomm Coresight bindings or Qualcomm SoC > DTS nodes with Coresight till we fix all existing warnings. I don't know > how to fix them, so I need help with them. No such fixing happened so > far from Qcom, so pushback is my only way to get any attention. > > I already commented on this in other email thread. Are you addressing this ? Suzuki > > Best regards, > Krzysztof >
On 12/18/2023 6:47 PM, Suzuki K Poulose wrote: > Tao Zhang, > > On 21/11/2023 07:24, Krzysztof Kozlowski wrote: >> On 21/11/2023 03:24, Tao Zhang wrote: >>> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) >>> for TPDM. It specifies the number of CMB MSR registers supported by >>> the TDPM. >>> >>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >>> --- >> >> I prefer not to take any new Qualcomm Coresight bindings or Qualcomm SoC >> DTS nodes with Coresight till we fix all existing warnings. I don't know >> how to fix them, so I need help with them. No such fixing happened so >> far from Qcom, so pushback is my only way to get any attention. >> >> I already commented on this in other email thread. > > Are you addressing this ? The DT warning is fixed in https://lore.kernel.org/linux-arm-msm/20231210072633.4243-1-quic_jinlmao@quicinc.com/. It's applied to linux-arm-msm yesterday. > > Suzuki > >> >> Best regards, >> Krzysztof >> >
Hi Tingwei Zhang On 18/12/2023 11:23, Tingwei Zhang wrote: > On 12/18/2023 6:47 PM, Suzuki K Poulose wrote: >> Tao Zhang, >> >> On 21/11/2023 07:24, Krzysztof Kozlowski wrote: >>> On 21/11/2023 03:24, Tao Zhang wrote: >>>> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) >>>> for TPDM. It specifies the number of CMB MSR registers supported by >>>> the TDPM. >>>> >>>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >>>> --- >>> >>> I prefer not to take any new Qualcomm Coresight bindings or Qualcomm SoC >>> DTS nodes with Coresight till we fix all existing warnings. I don't know >>> how to fix them, so I need help with them. No such fixing happened so >>> far from Qcom, so pushback is my only way to get any attention. >>> >>> I already commented on this in other email thread. >> >> Are you addressing this ? > The DT warning is fixed in > https://lore.kernel.org/linux-arm-msm/20231210072633.4243-1-quic_jinlmao@quicinc.com/. > It's applied to linux-arm-msm yesterday. How are you supporting remote-etm ? We haven't merged the support for it in drivers ? We haven't even reviewed the remote-etm support patches ? Why weren't the coresight maintainers Cc ed on the "new" binding support ? Suzuki >> >> Suzuki >> >>> >>> Best regards, >>> Krzysztof >>> >> >
On 12/18/2023 7:56 PM, Suzuki K Poulose wrote: > Hi Tingwei Zhang > > On 18/12/2023 11:23, Tingwei Zhang wrote: >> On 12/18/2023 6:47 PM, Suzuki K Poulose wrote: >>> Tao Zhang, >>> >>> On 21/11/2023 07:24, Krzysztof Kozlowski wrote: >>>> On 21/11/2023 03:24, Tao Zhang wrote: >>>>> Add property "qcom,cmb_msr_num" to support CMB MSR(mux select >>>>> register) >>>>> for TPDM. It specifies the number of CMB MSR registers supported by >>>>> the TDPM. >>>>> >>>>> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> >>>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> >>>>> --- >>>> >>>> I prefer not to take any new Qualcomm Coresight bindings or Qualcomm >>>> SoC >>>> DTS nodes with Coresight till we fix all existing warnings. I don't >>>> know >>>> how to fix them, so I need help with them. No such fixing happened so >>>> far from Qcom, so pushback is my only way to get any attention. >>>> >>>> I already commented on this in other email thread. >>> >>> Are you addressing this ? >> The DT warning is fixed in >> https://lore.kernel.org/linux-arm-msm/20231210072633.4243-1-quic_jinlmao@quicinc.com/. >> It's applied to linux-arm-msm yesterday. > > How are you supporting remote-etm ? We haven't merged the support for it > in drivers ? We haven't even reviewed the remote-etm support patches ? > Why weren't the coresight maintainers Cc ed on the "new" binding support ? > > Suzuki > > Hi Suzuki, Sorry for missing coresight maintainers in the remote-etm binding patch. From the comments, we can add binding for the connected hardware first. https://lkml.org/lkml/2023/11/30/539 Thanks Jinlong Mao > >>> >>> Suzuki >>> >>>> >>>> Best regards, >>>> Krzysztof >>>> >>> >> >
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index 0d9fe01a8b15..e9e2d162a621 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -70,6 +70,15 @@ properties: minimum: 0 maximum: 32 + qcom,cmb-msrs-num: + description: + Specifies the number of CMB MSR(mux select register) registers supported + by the monitor. If this property is not configured or set to 0, it means + this TPDM doesn't support CMB MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + clocks: maxItems: 1 @@ -125,6 +134,7 @@ examples: reg-names = "tpdm-base"; qcom,cmb-element-size = /bits/ 8 <64>; + qcom,cmb-msrs-num = <32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk";