Message ID | 20231116130620.4787-1-zajec5@gmail.com |
---|---|
State | New |
Headers | show |
Series | dt-bindings: crypto: convert Inside Secure SafeXcel to the json-schema | expand |
On 16/11/2023 14:06, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. > > Cc: Antoine Tenart <atenart@kernel.org> > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > .../crypto/inside-secure-safexcel.txt | 40 --------- > .../crypto/inside-secure-safexcel.yaml | 84 +++++++++++++++++++ > 2 files changed, 84 insertions(+), 40 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt > create mode 100644 Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt > deleted file mode 100644 > index 3bbf144c9988..000000000000 > --- a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt > +++ /dev/null > @@ -1,40 +0,0 @@ > -Inside Secure SafeXcel cryptographic engine > - > -Required properties: > -- compatible: Should be "inside-secure,safexcel-eip197b", > - "inside-secure,safexcel-eip197d" or > - "inside-secure,safexcel-eip97ies". > -- reg: Base physical address of the engine and length of memory mapped region. > -- interrupts: Interrupt numbers for the rings and engine. > -- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". > - > -Optional properties: > -- clocks: Reference to the crypto engine clocks, the second clock is > - needed for the Armada 7K/8K SoCs. > -- clock-names: mandatory if there is a second clock, in this case the > - name must be "core" for the first clock and "reg" for > - the second one. > - > -Backward compatibility: > -Two compatibles are kept for backward compatibility, but shouldn't be used for > -new submissions: > -- "inside-secure,safexcel-eip197" is equivalent to > - "inside-secure,safexcel-eip197b". > -- "inside-secure,safexcel-eip97" is equivalent to > - "inside-secure,safexcel-eip97ies". > - > -Example: > - > - crypto: crypto@800000 { > - compatible = "inside-secure,safexcel-eip197b"; > - reg = <0x800000 0x200000>; > - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", > - "eip"; > - clocks = <&cpm_syscon0 1 26>; > - }; > diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml > new file mode 100644 > index 000000000000..4dfd5ddd90bb > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml Filename like compatible, so: inside-secure,safexcel.yaml > @@ -0,0 +1,84 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/inside-secure-safexcel.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Inside Secure SafeXcel cryptographic engine > + > +maintainers: > + - Antoine Tenart <atenart@kernel.org> > + > +properties: > + compatible: > + oneOf: > + - const: inside-secure,safexcel-eip197b > + - const: inside-secure,safexcel-eip197d > + - const: inside-secure,safexcel-eip97ies > + - const: inside-secure,safexcel-eip197 > + description: Equivalent of inside-secure,safexcel-eip197b > + deprecated: true > + - const: inside-secure,safexcel-eip97 > + description: Equivalent of inside-secure,safexcel-eip97ies > + deprecated: true Wait, some new entries appear here and commit msg said nothing about changes in the binding. Commit says it is pure conversion. You must document all changes made. > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 6 Drop > + maxItems: 6 > + > + interrupt-names: > + items: > + - const: ring0 > + - const: ring1 > + - const: ring2 > + - const: ring3 > + - const: eip > + - const: mem > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + minItems: 1 > + items: > + - const: core > + - const: reg > + > +allOf: > + - if: > + properties: > + clocks: > + minItems: 2 > + then: > + required: > + - clock-names Did you test that it actually works? Considering other patchset which you did not, I have doubts that this was... > + > +additionalProperties: false > + > +required: required goes just after properties:. > + - reg > + - interrupts > + - interrupt-names Best regards, Krzysztof
On 2023-11-16 15:42, Krzysztof Kozlowski wrote: >> +properties: >> + compatible: >> + oneOf: >> + - const: inside-secure,safexcel-eip197b >> + - const: inside-secure,safexcel-eip197d >> + - const: inside-secure,safexcel-eip97ies >> + - const: inside-secure,safexcel-eip197 >> + description: Equivalent of inside-secure,safexcel-eip197b >> + deprecated: true >> + - const: inside-secure,safexcel-eip97 >> + description: Equivalent of inside-secure,safexcel-eip97ies >> + deprecated: true > > Wait, some new entries appear here and commit msg said nothing about > changes in the binding. Commit says it is pure conversion. You must > document all changes made. I may make many mistakes but not one like that. I am phobic to adding new stuff silently. All those entries were documented in .txt. >> +allOf: >> + - if: >> + properties: >> + clocks: >> + minItems: 2 >> + then: >> + required: >> + - clock-names > > Did you test that it actually works? Considering other patchset which > you did not, I have doubts that this was... Sorry, I really have bad experience with Python due its maze of dependencies and unfriendly feedback. I just wasted half an hour debugging error like: Traceback (most recent call last): File "/home/rmilecki/.local/bin/dt-doc-validate", line 64, in <module> ret |= check_doc(f) File "/home/rmilecki/.local/bin/dt-doc-validate", line 32, in check_doc for error in sorted(dtsch.iter_errors(), key=lambda e: e.linecol): File "/home/rmilecki/.local/lib/python3.10/site-packages/dtschema/schema.py", line 132, in iter_errors self.annotate_error(scherr, meta_schema, scherr.schema_path) File "/home/rmilecki/.local/lib/python3.10/site-packages/dtschema/schema.py", line 111, in annotate_error schema = schema[p] KeyError: 'type' which turned out to be a result of some outdated examples files. I tested that binding thought. Still after another look at that allOf I found one more corner case to cover.
diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt deleted file mode 100644 index 3bbf144c9988..000000000000 --- a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt +++ /dev/null @@ -1,40 +0,0 @@ -Inside Secure SafeXcel cryptographic engine - -Required properties: -- compatible: Should be "inside-secure,safexcel-eip197b", - "inside-secure,safexcel-eip197d" or - "inside-secure,safexcel-eip97ies". -- reg: Base physical address of the engine and length of memory mapped region. -- interrupts: Interrupt numbers for the rings and engine. -- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". - -Optional properties: -- clocks: Reference to the crypto engine clocks, the second clock is - needed for the Armada 7K/8K SoCs. -- clock-names: mandatory if there is a second clock, in this case the - name must be "core" for the first clock and "reg" for - the second one. - -Backward compatibility: -Two compatibles are kept for backward compatibility, but shouldn't be used for -new submissions: -- "inside-secure,safexcel-eip197" is equivalent to - "inside-secure,safexcel-eip197b". -- "inside-secure,safexcel-eip97" is equivalent to - "inside-secure,safexcel-eip97ies". - -Example: - - crypto: crypto@800000 { - compatible = "inside-secure,safexcel-eip197b"; - reg = <0x800000 0x200000>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", - "eip"; - clocks = <&cpm_syscon0 1 26>; - }; diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml new file mode 100644 index 000000000000..4dfd5ddd90bb --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/inside-secure-safexcel.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Inside Secure SafeXcel cryptographic engine + +maintainers: + - Antoine Tenart <atenart@kernel.org> + +properties: + compatible: + oneOf: + - const: inside-secure,safexcel-eip197b + - const: inside-secure,safexcel-eip197d + - const: inside-secure,safexcel-eip97ies + - const: inside-secure,safexcel-eip197 + description: Equivalent of inside-secure,safexcel-eip197b + deprecated: true + - const: inside-secure,safexcel-eip97 + description: Equivalent of inside-secure,safexcel-eip97ies + deprecated: true + + reg: + maxItems: 1 + + interrupts: + minItems: 6 + maxItems: 6 + + interrupt-names: + items: + - const: ring0 + - const: ring1 + - const: ring2 + - const: ring3 + - const: eip + - const: mem + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: core + - const: reg + +allOf: + - if: + properties: + clocks: + minItems: 2 + then: + required: + - clock-names + +additionalProperties: false + +required: + - reg + - interrupts + - interrupt-names + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + crypto@800000 { + compatible = "inside-secure,safexcel-eip197b"; + reg = <0x800000 0x200000>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ring0", "ring1", "ring2", "ring3", "eip", "mem"; + clocks = <&cpm_syscon0 1 26>; + clock-names = "core"; + };