| Message ID | 20231112184557.3801-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/2] dt-bindings: PCI: qcom: adjust iommu-map for different SoC | expand |
On Sun, 12 Nov 2023 at 20:46, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > PCI node in Qualcomm SC8180x DTS has 8 clocks, while one on SM8150 has 7 > clocks: > > sc8180x-primus.dtb: pci@1c00000: 'oneOf' conditional failed, one must be fixed: > ['pipe', 'aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a', 'ref', 'tbu'] is too short > > sm8150-hdk.dtb: pci@1c00000: 'oneOf' conditional failed, one must be fixed: > ['pipe', 'aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a', 'ref', 'tbu'] is too short > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 58 ++++++++++++++++++- > 1 file changed, 57 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 14d25e8a18e4..4c993ea97d7c 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -479,6 +479,35 @@ allOf: > items: > - const: pci # PCIe core reset > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,pcie-sc8180x > + then: > + oneOf: > + - properties: > + clocks: > + minItems: 8 > + maxItems: 8 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: ref # REFERENCE clock > + - const: tbu # PCIe TBU clock > + properties: > + resets: > + maxItems: 1 > + reset-names: > + items: > + - const: pci # PCIe core reset > + > - if: > properties: > compatible: > @@ -527,8 +556,35 @@ allOf: > compatible: > contains: > enum: > - - qcom,pcie-sc8180x > - qcom,pcie-sm8150 > + then: > + oneOf: > + - properties: > + clocks: > + minItems: 7 > + maxItems: 7 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock Which actually brings up a question, there is the corresponding clkref gcc clock. Mani, do you know if we should use it on sm8150? > + - const: tbu # PCIe TBU clock > + properties: > + resets: > + maxItems: 1 > + reset-names: > + items: > + - const: pci # PCIe core reset > + > + > + - if: > + properties: > + compatible: > + contains: > + enum: > - qcom,pcie-sm8250 > then: > oneOf: > -- > 2.34.1 > >
On Sun, Nov 12, 2023 at 07:45:56PM +0100, Krzysztof Kozlowski wrote: > The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998 > has one and SDM845 has sixteen, so allow wider number of items to fix > dtbs_check warnings like: > > qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1], > [512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 8bfae8eb79a3..14d25e8a18e4 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -62,7 +62,8 @@ properties: > maxItems: 8 > > iommu-map: > - maxItems: 2 > + minItems: 1 > + maxItems: 16 > > # Common definitions for clocks, clock-names and reset. > # Platform constraints are described later. > -- > 2.34.1 >
On Sun, Nov 12, 2023 at 07:45:57PM +0100, Krzysztof Kozlowski wrote: > PCI node in Qualcomm SC8180x DTS has 8 clocks, while one on SM8150 has 7 > clocks: > > sc8180x-primus.dtb: pci@1c00000: 'oneOf' conditional failed, one must be fixed: > ['pipe', 'aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a', 'ref', 'tbu'] is too short > > sm8150-hdk.dtb: pci@1c00000: 'oneOf' conditional failed, one must be fixed: > ['pipe', 'aux', 'cfg', 'bus_master', 'bus_slave', 'slave_q2a', 'ref', 'tbu'] is too short This error says that SM8150 has 8 clocks defined in DT, but it has only 7. I'm confused. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Anyway, the patch looks good to me. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 58 ++++++++++++++++++- > 1 file changed, 57 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 14d25e8a18e4..4c993ea97d7c 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -479,6 +479,35 @@ allOf: > items: > - const: pci # PCIe core reset > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,pcie-sc8180x > + then: > + oneOf: > + - properties: > + clocks: > + minItems: 8 > + maxItems: 8 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: ref # REFERENCE clock > + - const: tbu # PCIe TBU clock > + properties: > + resets: > + maxItems: 1 > + reset-names: > + items: > + - const: pci # PCIe core reset > + > - if: > properties: > compatible: > @@ -527,8 +556,35 @@ allOf: > compatible: > contains: > enum: > - - qcom,pcie-sc8180x > - qcom,pcie-sm8150 > + then: > + oneOf: > + - properties: > + clocks: > + minItems: 7 > + maxItems: 7 > + clock-names: > + items: > + - const: pipe # PIPE clock > + - const: aux # Auxiliary clock > + - const: cfg # Configuration clock > + - const: bus_master # Master AXI clock > + - const: bus_slave # Slave AXI clock > + - const: slave_q2a # Slave Q2A clock > + - const: tbu # PCIe TBU clock > + properties: > + resets: > + maxItems: 1 > + reset-names: > + items: > + - const: pci # PCIe core reset > + > + > + - if: > + properties: > + compatible: > + contains: > + enum: > - qcom,pcie-sm8250 > then: > oneOf: > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 8bfae8eb79a3..14d25e8a18e4 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -62,7 +62,8 @@ properties: maxItems: 8 iommu-map: - maxItems: 2 + minItems: 1 + maxItems: 16 # Common definitions for clocks, clock-names and reset. # Platform constraints are described later.
The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998 has one and SDM845 has sixteen, so allow wider number of items to fix dtbs_check warnings like: qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1], [512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)