diff mbox series

[v2,32/35,1/2] target/alpha: Pass immediate value to gen_bcond_internal()

Message ID 20231108205247.83234-1-philmd@linaro.org
State New
Headers show
Series None | expand

Commit Message

Philippe Mathieu-Daudé Nov. 8, 2023, 8:52 p.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>

Simplify gen_bcond() by passing an immediate value.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 1/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/alpha/translate.c | 21 +++++++--------------
 1 file changed, 7 insertions(+), 14 deletions(-)

Comments

Philippe Mathieu-Daudé Nov. 8, 2023, 8:55 p.m. UTC | #1 
On 8/11/23 21:52, Philippe Mathieu-Daudé wrote:
> From: Richard Henderson <richard.henderson@linaro.org>
> 
> Simplify gen_bcond() by passing an immediate value.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org>
> [PMD: Split from bigger patch, part 1/2]
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/alpha/translate.c | 21 +++++++--------------
>   1 file changed, 7 insertions(+), 14 deletions(-)
> 
> diff --git a/target/alpha/translate.c b/target/alpha/translate.c
> index 32333081d8..46efe1df7c 100644
> --- a/target/alpha/translate.c
> +++ b/target/alpha/translate.c
> @@ -453,13 +453,13 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp)
>   }
>   
>   static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
> -                                        TCGv cmp, int32_t disp)
> +                                        TCGv cmp, uint64_t imm, int32_t disp)
>   {
>       uint64_t dest = ctx->base.pc_next + (disp << 2);
>       TCGLabel *lab_true = gen_new_label();
>   
>       if (use_goto_tb(ctx, dest)) {
> -        tcg_gen_brcondi_i64(cond, cmp, 0, lab_true);
> +        tcg_gen_brcondi_i64(cond, cmp, imm, lab_true);
>   
>           tcg_gen_goto_tb(0);
>           tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next);
> @@ -472,11 +472,11 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
>   
>           return DISAS_NORETURN;
>       } else {
> -        TCGv_i64 z = load_zero(ctx);
> +        TCGv_i64 i = tcg_constant_i64(imm);
>           TCGv_i64 d = tcg_constant_i64(dest);
>           TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next);
>   
> -        tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p);
> +        tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p);
>           return DISAS_PC_UPDATED;
>       }
>   }
> @@ -484,15 +484,8 @@ static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
>   static DisasJumpType gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
>                                  int32_t disp, int mask)
>   {
> -    if (mask) {
> -        TCGv tmp = tcg_temp_new();
> -        DisasJumpType ret;
> -
> -        tcg_gen_andi_i64(tmp, load_gpr(ctx, ra), 1);
> -        ret = gen_bcond_internal(ctx, cond, tmp, disp);
> -        return ret;
> -    }
> -    return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra), disp);
> +    return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra),
> +                              !!mask, disp);

Hmm we can pass 'mask' directly.

>   }
>   
>   /* Fold -0.0 for comparison with COND.  */
> @@ -533,7 +526,7 @@ static DisasJumpType gen_fbcond(DisasContext *ctx, TCGCond cond, int ra,
>       DisasJumpType ret;
>   
>       gen_fold_mzero(cond, cmp_tmp, load_fpr(ctx, ra));
> -    ret = gen_bcond_internal(ctx, cond, cmp_tmp, disp);
> +    ret = gen_bcond_internal(ctx, cond, cmp_tmp, 0, disp);
>       return ret;
>   }
>
diff mbox series

Patch

diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 32333081d8..46efe1df7c 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -453,13 +453,13 @@  static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp)
 }
 
 static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
-                                        TCGv cmp, int32_t disp)
+                                        TCGv cmp, uint64_t imm, int32_t disp)
 {
     uint64_t dest = ctx->base.pc_next + (disp << 2);
     TCGLabel *lab_true = gen_new_label();
 
     if (use_goto_tb(ctx, dest)) {
-        tcg_gen_brcondi_i64(cond, cmp, 0, lab_true);
+        tcg_gen_brcondi_i64(cond, cmp, imm, lab_true);
 
         tcg_gen_goto_tb(0);
         tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next);
@@ -472,11 +472,11 @@  static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
 
         return DISAS_NORETURN;
     } else {
-        TCGv_i64 z = load_zero(ctx);
+        TCGv_i64 i = tcg_constant_i64(imm);
         TCGv_i64 d = tcg_constant_i64(dest);
         TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next);
 
-        tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p);
+        tcg_gen_movcond_i64(cond, cpu_pc, cmp, i, d, p);
         return DISAS_PC_UPDATED;
     }
 }
@@ -484,15 +484,8 @@  static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond,
 static DisasJumpType gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
                                int32_t disp, int mask)
 {
-    if (mask) {
-        TCGv tmp = tcg_temp_new();
-        DisasJumpType ret;
-
-        tcg_gen_andi_i64(tmp, load_gpr(ctx, ra), 1);
-        ret = gen_bcond_internal(ctx, cond, tmp, disp);
-        return ret;
-    }
-    return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra), disp);
+    return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra),
+                              !!mask, disp);
 }
 
 /* Fold -0.0 for comparison with COND.  */
@@ -533,7 +526,7 @@  static DisasJumpType gen_fbcond(DisasContext *ctx, TCGCond cond, int ra,
     DisasJumpType ret;
 
     gen_fold_mzero(cond, cmp_tmp, load_fpr(ctx, ra));
-    ret = gen_bcond_internal(ctx, cond, cmp_tmp, disp);
+    ret = gen_bcond_internal(ctx, cond, cmp_tmp, 0, disp);
     return ret;
 }