| Message ID | 20231103230339.966792-1-quic_eberman@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | dt-bindings: phy: Document sm8450 pcie phys as having 4 clocks | expand |
On 11/15/2023 2:15 AM, Johan Hovold wrote: > On Fri, Nov 03, 2023 at 04:03:38PM -0700, Elliot Berman wrote: >> I noticed while running make dtbs_check that >> qcom,sm8450-qmp-gen3x1-pcie-phy and qcom,sm8450-qmp-gen4x2-pcie-phy have >> 4 clocks, not 5. There was also a typo for the 8450 bindings: >> s/gen3x2/gen4x2/. >> >> Update the bindings to reflect the correct number of required clocks. >> >> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> >> Fixes: 505fb2541678 ("dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml") >> Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> >> --- >> .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 16 ++++++++++++++-- >> 1 file changed, 14 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >> index 2c3d6553a7ba..1768f2016a9f 100644 >> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml >> @@ -128,6 +128,20 @@ allOf: >> reg: >> maxItems: 1 >> >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - qcom,sm8450-qmp-gen3x1-pcie-phy >> + - qcom,sm8450-qmp-gen4x2-pcie-phy >> + then: >> + properties: >> + clocks: >> + minItems: 4 >> + clock-names: >> + minItems: 4 >> + > > I'm not sure which tree you think you're looking at but this is clearly > not correct. > > The phy nodes in arch/arm64/boot/dts/qcom/sm8450.dtsi have five clocks > defined. > You're right, next now has 5 clocks for 8450. -next vs. tip of tree strikes me again :) I'll send out a fix for just the typo tomorrow/Friday when I do another sweep of dtbs_check (on next/master instead of torvalds/master). > Johan
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 2c3d6553a7ba..1768f2016a9f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -128,6 +128,20 @@ allOf: reg: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8450-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + then: + properties: + clocks: + minItems: 4 + clock-names: + minItems: 4 + - if: properties: compatible: @@ -143,8 +157,6 @@ allOf: - qcom,sm8250-qmp-gen3x2-pcie-phy - qcom,sm8250-qmp-modem-pcie-phy - qcom,sm8350-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen3x2-pcie-phy - qcom,sm8550-qmp-gen3x2-pcie-phy - qcom,sm8550-qmp-gen4x2-pcie-phy then:
I noticed while running make dtbs_check that qcom,sm8450-qmp-gen3x1-pcie-phy and qcom,sm8450-qmp-gen4x2-pcie-phy have 4 clocks, not 5. There was also a typo for the 8450 bindings: s/gen3x2/gen4x2/. Update the bindings to reflect the correct number of required clocks. Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: 505fb2541678 ("dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml") Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> --- .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)