| Message ID | 20231025202344.581132-4-sunilvl@ventanamicro.com |
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From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
linux-pci@vger.kernel.org, linux-serial@vger.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Anup Patel <anup@brainfault.org>,
Thomas Gleixner <tglx@linutronix.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Conor Dooley <conor.dooley@microchip.com>,
Andrew Jones <ajones@ventanamicro.com>,
Atish Kumar Patra <atishp@rivosinc.com>,
Haibo Xu <haibo1.xu@intel.com>,
Sunil V L <sunilvl@ventanamicro.com>
Subject: [RFC PATCH v2 03/21] ACPI: Kconfig: Introduce new option to support
deferred GSI probe
Date: Thu, 26 Oct 2023 01:53:26 +0530
Message-Id: <20231025202344.581132-4-sunilvl@ventanamicro.com>
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| Series |
RISC-V: ACPI: Add external interrupt controller support
|
expand
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diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index cee82b473dc5..4399e793f1d2 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -51,6 +51,9 @@ config ARCH_MIGHT_HAVE_ACPI_PDC config ACPI_GENERIC_GSI bool +config ARCH_ACPI_DEFERRED_GSI + bool + config ACPI_SYSTEM_POWER_STATES_SUPPORT bool
On some architectures like RISC-V, the interrupt controllers for Global System Interrupts (GSI) are not probed early during boot. So, the device drivers which need to register their GSI, need to be deferred until the actual interrupt controller driver is probed. To reduce the impact of such change, add a new CONFIG option which can be set only by the architecture which needs deferred GSI probing. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> --- drivers/acpi/Kconfig | 3 +++ 1 file changed, 3 insertions(+)